Ross Thompson 7b3716c281 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main		2021-07-02 13:56:49 -05:00
..
buildroot	Merge branch 'main' into bigbadbranch	2021-07-02 11:52:26 -05:00
busybear	Merge branch 'main' into bigbadbranch	2021-07-02 11:52:26 -05:00
coremark	remove OVP_CSR_CONFIG because it is an alias of BUSYBEAR	2021-06-20 22:38:25 -04:00
coremark_bare	remove OVP_CSR_CONFIG because it is an alias of BUSYBEAR	2021-06-20 22:38:25 -04:00
coremark-64i	allow all size memory access in CLINT; added underscore to peripheral address symbols	2021-06-18 08:05:50 -04:00
rv32ic	Light cleanup of signals, style. Changed several signals to account for new Phys Addr sizes as opposed to HADDR.	2021-06-24 20:01:11 -04:00
rv64BP	remove OVP_CSR_CONFIG because it is an alias of BUSYBEAR	2021-06-20 22:38:25 -04:00
rv64ic	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-07-02 13:56:49 -05:00
rv64icfd	remove OVP_CSR_CONFIG because it is an alias of BUSYBEAR	2021-06-20 22:38:25 -04:00
rv64imc	remove OVP_CSR_CONFIG because it is an alias of BUSYBEAR	2021-06-20 22:38:25 -04:00
shared	Cleaned up fcsr code and added _SUPPORTED to optionally disable peripherals	2021-06-20 22:59:04 -04:00