# RISC-V Architecture Test RV32I Makefrag # # Copyright (c) 2017, Codasip Ltd. # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: # * Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # * Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # * Neither the name of the Codasip Ltd. nor the # names of its contributors may be used to endorse or promote products # derived from this software without specific prior written permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS # IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, # THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR # PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd. BE LIABLE FOR ANY # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Description: Makefrag for RV32I architectural tests rv32i_sc_tests = \ add-01 \ addi-01 \ and-01 \ andi-01 \ auipc-01 \ beq-01 \ bge-01 \ bgeu-01 \ blt-01 \ bltu-01 \ bne-01 \ jal-01 \ jalr-01 \ lb-align-01 \ lbu-align-01 \ lh-align-01 \ lhu-align-01 \ lui-01 \ lw-align-01 \ or-01 \ ori-01 \ sb-align-01 \ sh-align-01 \ sll-01 \ slli-01 \ slt-01 \ slti-01 \ sltiu-01 \ sltu-01 \ sra-01 \ srai-01 \ srl-01 \ srli-01 \ sub-01 \ sw-align-01 \ xor-01 \ xori-01 \ fence-01 rv32i_tests = $(addsuffix .elf, $(rv32i_sc_tests)) target_tests += $(rv32i_tests)