From f9533fea1a99b1634789dd8457740d1d55f0941f Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 31 May 2022 21:32:31 +0000 Subject: [PATCH] Removed normalized output from unpack and simplified interface --- pipelined/src/fpu/fclassify.sv | 4 ++-- pipelined/src/fpu/fpu.sv | 5 ++--- pipelined/src/fpu/unpack.sv | 13 +++--------- pipelined/src/fpu/unpackinput.sv | 35 ++++++++------------------------ 4 files changed, 16 insertions(+), 41 deletions(-) diff --git a/pipelined/src/fpu/fclassify.sv b/pipelined/src/fpu/fclassify.sv index dd6165ca..05a91d21 100644 --- a/pipelined/src/fpu/fclassify.sv +++ b/pipelined/src/fpu/fclassify.sv @@ -5,7 +5,6 @@ module fclassify ( input logic XSgnE, // sign bit input logic XNaNE, // is NaN input logic XSNaNE, // is signaling NaN - input logic XNormE, // is normal input logic XDenormE, // is denormal input logic XZeroE, // is zero input logic XInfE, // is infinity @@ -14,9 +13,10 @@ module fclassify ( logic PInf, PZero, PNorm, PDenorm; logic NInf, NZero, NNorm, NDenorm; - + logic XNormE; // determine the sub categories + assign XNormE = ~(XNaNE | XInfE | XDenormE | XZeroE); assign PInf = ~XSgnE&XInfE; assign NInf = XSgnE&XInfE; assign PNorm = ~XSgnE&XNormE; diff --git a/pipelined/src/fpu/fpu.sv b/pipelined/src/fpu/fpu.sv index 053d3dd5..75781092 100755 --- a/pipelined/src/fpu/fpu.sv +++ b/pipelined/src/fpu/fpu.sv @@ -103,7 +103,6 @@ module fpu ( logic XInfM, YInfM, ZInfM; // is the input infinity - memory stage logic XInfQ, YInfQ; // is the input infinity - divide logic XExpMaxE; // is the exponent all ones (max value) - logic XNormE; // is normal logic FmtQ; logic FOpCtrlQ; @@ -178,7 +177,7 @@ module fpu ( unpack unpack (.X(FSrcXE), .Y(FSrcYE), .Z(FSrcZE), .FmtE, .XSgnE, .YSgnE, .ZSgnE, .XExpE, .YExpE, .ZExpE, .XManE, .YManE, .ZManE, .XNaNE, .YNaNE, .ZNaNE, .XSNaNE, .YSNaNE, .ZSNaNE, .XDenormE, .YDenormE, .ZDenormE, - .XZeroE, .YZeroE, .ZZeroE, .XInfE, .YInfE, .ZInfE, .XExpMaxE, .XNormE); + .XZeroE, .YZeroE, .ZZeroE, .XInfE, .YInfE, .ZInfE, .XExpMaxE); // FMA // - two stage FMA @@ -215,7 +214,7 @@ module fpu ( fcmp fcmp (.FmtE, .FOpCtrlE, .XSgnE, .YSgnE, .XExpE, .YExpE, .XManE, .YManE, .XZeroE, .YZeroE, .XNaNE, .YNaNE, .XSNaNE, .YSNaNE, .FSrcXE, .FSrcYE, .CmpNVE, .CmpResE); fsgninj fsgninj(.SgnOpCodeE(FOpCtrlE[1:0]), .XSgnE, .YSgnE, .FSrcXE, .FmtE, .SgnResE); - fclassify fclassify (.XSgnE, .XDenormE, .XZeroE, .XNaNE, .XInfE, .XNormE, .XSNaNE, .ClassResE); + fclassify fclassify (.XSgnE, .XDenormE, .XZeroE, .XNaNE, .XInfE, .XSNaNE, .ClassResE); fcvt fcvt (.XSgnE, .XExpE, .XManE, .ForwardedSrcAE, .FOpCtrlE, .FWriteIntE, .XZeroE, .XDenormE, .XInfE, .XNaNE, .XSNaNE, .FrmE, .FmtE, .CvtResE, .CvtIntResE, .CvtFlgE); diff --git a/pipelined/src/fpu/unpack.sv b/pipelined/src/fpu/unpack.sv index 9e691e27..e9f005e7 100644 --- a/pipelined/src/fpu/unpack.sv +++ b/pipelined/src/fpu/unpack.sv @@ -6,7 +6,6 @@ module unpack ( output logic XSgnE, YSgnE, ZSgnE, // sign bits of XYZ output logic [`NE-1:0] XExpE, YExpE, ZExpE, // exponents of XYZ (converted to largest supported precision) output logic [`NF:0] XManE, YManE, ZManE, // mantissas of XYZ (converted to largest supported precision) - output logic XNormE, // is X a normalized number output logic XNaNE, YNaNE, ZNaNE, // is XYZ a NaN output logic XSNaNE, YSNaNE, ZSNaNE, // is XYZ a signaling NaN output logic XDenormE, YDenormE, ZDenormE, // is XYZ denormalized @@ -18,23 +17,17 @@ module unpack ( logic [`NF-1:0] XFracE, YFracE, ZFracE; //Fraction of XYZ logic XExpNonzero, YExpNonzero, ZExpNonzero; // is the exponent of XYZ non-zero logic XFracZero, YFracZero, ZFracZero; // is the fraction zero - logic XExpZero, YExpZero, ZExpZero; // is the exponent zero logic YExpMaxE, ZExpMaxE; // is the exponent all 1s unpackinput unpackinputX (.In(X), .FmtE, .Sgn(XSgnE), .Exp(XExpE), .Man(XManE), .NaN(XNaNE), .SNaN(XSNaNE), .Denorm(XDenormE), - .Zero(XZeroE), .Inf(XInfE), .ExpMax(XExpMaxE), .ExpZero(XExpZero)); + .Zero(XZeroE), .Inf(XInfE), .ExpMax(XExpMaxE)); unpackinput unpackinputY (.In(Y), .FmtE, .Sgn(YSgnE), .Exp(YExpE), .Man(YManE), .NaN(YNaNE), .SNaN(YSNaNE), .Denorm(YDenormE), - .Zero(YZeroE), .Inf(YInfE), .ExpMax(YExpMaxE), .ExpZero(YExpZero)); + .Zero(YZeroE), .Inf(YInfE), .ExpMax(YExpMaxE)); unpackinput unpackinputZ (.In(Z), .FmtE, .Sgn(ZSgnE), .Exp(ZExpE), .Man(ZManE), .NaN(ZNaNE), .SNaN(ZSNaNE), .Denorm(ZDenormE), - .Zero(ZZeroE), .Inf(ZInfE), .ExpMax(ZExpMaxE), .ExpZero(ZExpZero)); - - - // is X normalized - assign XNormE = ~(XExpMaxE|XExpZero); - + .Zero(ZZeroE), .Inf(ZInfE), .ExpMax(ZExpMaxE)); endmodule \ No newline at end of file diff --git a/pipelined/src/fpu/unpackinput.sv b/pipelined/src/fpu/unpackinput.sv index 0b944b64..6b39d41c 100644 --- a/pipelined/src/fpu/unpackinput.sv +++ b/pipelined/src/fpu/unpackinput.sv @@ -11,39 +11,22 @@ module unpackinput ( output logic Denorm, // is XYZ denormalized output logic Zero, // is XYZ zero output logic Inf, // is XYZ infinity - output logic ExpMax, // does In have the maximum exponent (NaN or Inf) - output logic ExpZero // is the exponent zero + output logic ExpMax // does In have the maximum exponent (NaN or Inf) ); logic [`NF-1:0] Frac; //Fraction of XYZ logic ExpNonZero; // is the exponent of XYZ non-zero logic FracZero; // is the fraction zero + logic ExpZero; if (`FPSIZES == 1) begin // if there is only one floating point format supported - - // sign bit - assign Sgn = In[`FLEN-1]; - - // fraction (no assumed 1) - assign Frac = In[`NF-1:0]; - - // is the fraction zero - assign FracZero = ~|Frac; - - // is the exponent non-zero - assign ExpNonZero = |Exp; - - // is the input (in it's original format) denormalized - assign Denorm = ~ExpNonZero & ~FracZero; - - // exponent - assign Exp = {In[`FLEN-2:`NF+1], In[`NF]|Denorm}; - - - // is the exponent all 1's - assign ExpMax = &Exp; - - + assign Sgn = In[`FLEN-1]; // sign bit + assign Frac = In[`NF-1:0]; // fraction (no assumed 1) + assign FracZero = ~|Frac; // is the fraction zero? + assign ExpNonZero = |Exp; // is the exponent non-zero + assign Denorm = ~ExpNonZero & ~FracZero; // is the input (in its original format) denormalized + assign Exp = {In[`FLEN-2:`NF+1], In[`NF]|Denorm}; // exponent. Denormalized numbers have effective biased exponent of 1 + assign ExpMax = &Exp; // is the exponent all 1's end else if (`FPSIZES == 2) begin // if there are 2 floating point formats supported //***need better names for these constants // largest format | smaller format