diff --git a/README.md b/README.md index b73aecdb..0dc68f1c 100644 --- a/README.md +++ b/README.md @@ -33,7 +33,7 @@ Then clone the repo, source setup, make the tests and run regression On the Linux computer where you will be working, log in -Clone your fork of the repo and run the setup script. +Clone your fork of the repo and run the setup script. Change to your github id. $ cd $ git clone --recurse-submodules https://github.com//cvw diff --git a/addins/riscv-arch-test b/addins/riscv-arch-test index a3b7f0c2..873d16e7 160000 --- a/addins/riscv-arch-test +++ b/addins/riscv-arch-test @@ -1 +1 @@ -Subproject commit a3b7f0c2cf89652b8a0cba3146890c512ff8ba44 +Subproject commit 873d16e748ad60023dcdda3926144957c096e31d diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index ef98aed7..2eddc136 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -29,7 +29,7 @@ # Use /opt/riscv for installation - may require running script with sudo export RISCV="${1:-/opt/riscv}" -export PATH=$PATH:$RISCV/bin +export PATH=$PATH:$RISCV/bin:/usr/bin set -e # break on error @@ -40,20 +40,20 @@ NUM_THREADS=8 # for >= 32GiB #NUM_THREADS=16 # for >= 64GiB sudo mkdir -p $RISCV +# *** need to update permissions to local user # Update and Upgrade tools (see https://itsfoss.com/apt-update-vs-upgrade/) -apt update -y -apt upgrade -y -apt install -y git gawk make texinfo bison flex build-essential python3 libz-dev libexpat-dev autoconf device-tree-compiler ninja-build libpixman-1-dev ncurses-base ncurses-bin libncurses5-dev dialog curl wget ftp libgmp-dev libglib2.0-dev python3-pip pkg-config opam z3 zlib1g-dev verilator - +sudo apt update -y +sudo apt upgrade -y +sudo apt install -y git gawk make texinfo bison flex build-essential python3 libz-dev libexpat-dev autoconf device-tree-compiler ninja-build libpixman-1-dev ncurses-base ncurses-bin libncurses5-dev dialog curl wget ftp libgmp-dev libglib2.0-dev python3-pip pkg-config opam z3 zlib1g-dev verilator automake autotools-dev libmpc-dev libmpfr-dev gperf libtool patchutils bc # Other python libraries used through the book. -pip3 install matplotlib scipy scikit-learn adjustText lief +sudo pip3 install matplotlib scipy scikit-learn adjustText lief # needed for Ubuntu 22.04, gcc cross compiler expects python not python2 or python3. if ! command -v python &> /dev/null then echo "WARNING: python3 was installed as python3 rather than python. Creating symlink." - ln -sf /usr/bin/python3 /usr/bin/python + sudo ln -sf /usr/bin/python3 /usr/bin/python fi # gcc cross-compiler (https://github.com/riscv-collab/riscv-gnu-toolchain) @@ -68,10 +68,12 @@ fi cd $RISCV git clone https://github.com/riscv/riscv-gnu-toolchain cd riscv-gnu-toolchain -git checkout 2023.01.31 -./configure --prefix=${RISCV} --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" +#git checkout 2023.01.31 #for 12.2.0; 2023.04.29 for 13.1 +# Temporarily use the following commands until gcc-13 is part of riscv-gnu-toolchain (issue #1249) +git clone https://github.com/gcc-mirror/gcc -b releases/gcc-13 gcc-13 +./configure --prefix=/opt/riscv --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" --with-gcc-src=`pwd`/gcc-13 +#./configure --prefix=${RISCV} --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" make -j ${NUM_THREADS} -make install # elf2hex (https://github.com/sifive/elf2hex) #The elf2hex utility to converts executable files into hexadecimal files for Verilog simulation. @@ -131,8 +133,9 @@ sed -i 's/--isa=rv64ic/--isa=rv64iac/' rv64i_m/privilege/Makefile.include #pip3 install chardet==3.0.4 #pip3 install urllib3==1.22 +cd $RISCV opam init -y --disable-sandboxing -opam switch create ocaml-base-compiler.4.06.1 +opam switch create ocaml-base-compiler.4.08.0 opam install sail -y eval $(opam config env) @@ -140,13 +143,14 @@ git clone https://github.com/riscv/sail-riscv.git cd sail-riscv # Current bug in Sail - use hash that works for Wally # (may remove later if Sail is ever fixed) -git checkout 4d05aa1698a0003a4f6f99e1380c743711c32052 +#git checkout 4d05aa1698a0003a4f6f99e1380c743711c32052 make -j ${NUM_THREADS} ARCH=RV32 make -j ${NUM_THREADS} -ARCH=RV64 make -j ${NUM_THREADS} -ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV64 /usr/bin/riscv_sim_RV64 -ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV32 /usr/bin/riscv_sim_RV32 +# next line seems redundant +#ARCH=RV64 make -j ${NUM_THREADS} +sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV64 /usr/bin/riscv_sim_RV64 +sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV32 /usr/bin/riscv_sim_RV32 -pip3 install testresources -pip3 install riscof --ignore-installed PyYAML +sudo pip3 install testresources +pip3 install git+https://github.com/riscv/riscof.git diff --git a/sim/coverage-exclusions-rv64gc.do b/sim/coverage-exclusions-rv64gc.do index ff9faeb5..a5244a8e 100644 --- a/sim/coverage-exclusions-rv64gc.do +++ b/sim/coverage-exclusions-rv64gc.do @@ -208,6 +208,12 @@ coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line2 -item e coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line2 -item b 1 coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line2 -item s 1 +# No irom +set line [GetLineNum ../src/ifu/ifu.sv "~ITLBMissF & ~CacheableF & ~SelIROM"] +coverage exclude -scope /dut/core/ifu -linerange $line-$line -item c 1 -feccondrow 6 +set line [GetLineNum ../src/ifu/ifu.sv "~ITLBMissF & CacheableF & ~SelIROM"] +coverage exclude -scope /dut/core/ifu -linerange $line-$line -item c 1 -feccondrow 4 + # Excluding reset and clear for impossible case in the wficountreg in privdec set line [GetLineNum ../src/generic/flop/floprc.sv "reset \\| clear"] coverage exclude -scope /dut/core/priv/priv/pmd/wfi/wficountreg -linerange $line-$line -item c 1 -feccondrow 2 diff --git a/tests/coverage/tlbGLB.S b/tests/coverage/tlbGLB.S index 03bc6a62..e6ae534b 100644 --- a/tests/coverage/tlbGLB.S +++ b/tests/coverage/tlbGLB.S @@ -3,8 +3,9 @@ // // Written: mmendozamanriquez@hmc.edu 4 April 2023 // nlimpert@hmc.edu +// Modified: kevin.j.thomas@okstate.edu May/4/20203 // -// Purpose: coverage for the global check. +// Purpose: Coverage for the Page Table Entry Global flag check. // // A component of the CORE-V-WALLY configurable RISC-V project. // @@ -35,43 +36,47 @@ main: li t5, 0x9000000000080080 // try making asid = 0. csrw satp, t5 - # sfence.vma x0, x0 - # switch to supervisor mode - li a0, 1 + li a0, 1 ecall - li t0, 0xC0000000 + li t5, 0 # j = 0, run nASID only once + li t3, 32 //Max amount of Loops = 32 + li t4, 0x1000 //offset between addressses. + li t1, 0x00008067 //load in jalr x0 x1 0 instruction to be stored +setup: + li t0, 0xC0000000 //starting address li t2, 0 # i = 0 - li t5, 0 # j = 0 // now use as a counter for new asid loop - li t3, 32 # Max amount of Loops = 32 + beq t5, zero, loop //jump to first loop -loop: bge t2, t3, nASID # exit loop if i >= loops - li t1, 0x00008067 #load in jalr - sw t1, 0(t0) - fence.I - jalr t0 - li t4, 0x1000 - add t0, t0, t4 - addi t2, t2, 1 +loop2: #jump to each of the addresses in different address space + bge t2, t3, done + jalr t0 //jump to instruction at the virtual address + add t0, t0, t4 //change address for next loop + addi t2, t2, 1 //keep track of number of loops ran + j loop2 + +loop: #store jalr across memory + bge t2, t3, nASID # exit loop if i >= loops + sw t1, 0(t0) //stores this jalr in the virtual address + fence.I //invalidate instruction cache + jalr t0 //jump to instruction at the virtual address + add t0, t0, t4 //change address for next loop + addi t2, t2, 1 //keep track of number of loops ran j loop -nASID: bne t5, zero, finished - li a0, 3 // go +nASID: #swap to different address space -> jump to each address + li a0, 3 //swap to machine mode ecall - li t5, 0x9000100000080080 // try making asid = 1 + li t5, 0x9000100000080080 //swap to address space 1 from 0 csrw satp, t5 - li a0, 1 + li a0, 1 // change back to supervisor mode. ecall - li t2, 0 - li t0, 0xC0000000 - li t5, 1 // make this not zero. - j loop + li t5, 1 //flag for finished after loops + j setup -finished: - j done .data .align 19