diff --git a/riscv-coremark/coremark/core_main.c b/riscv-coremark/coremark/core_main.c
index b2149a18..edd1ac46 100644
--- a/riscv-coremark/coremark/core_main.c
+++ b/riscv-coremark/coremark/core_main.c
@@ -286,17 +286,17 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) {
 			results[i].err=0;
 			if ((results[i].execs & ID_LIST) && 
 				(results[i].crclist!=list_known_crc[known_id])) {
-				ee_printf("[%u]ERROR! list crc 0x%04x - should be 0x%04x\n,i,results[i].crclist,list_known_crc[known_id]");
+				ee_printf("[%u]ERROR! list crc 0x%04x - should be 0x%04x\n",i,results[i].crclist,list_known_crc[known_id]);
 				results[i].err++;
 			}
 			if ((results[i].execs & ID_MATRIX) &&
 				(results[i].crcmatrix!=matrix_known_crc[known_id])) {
-				ee_printf("[%u]ERROR! matrix crc 0x%04x - should be 0x%04x\n,i,results[i].crcmatrix,matrix_known_crc[known_id]");
+				ee_printf("[%u]ERROR! matrix crc 0x%04x - should be 0x%04x\n",i,results[i].crcmatrix,matrix_known_crc[known_id]);
 				results[i].err++;
 			}
 			if ((results[i].execs & ID_STATE) &&
 				(results[i].crcstate!=state_known_crc[known_id])) {
-				ee_printf("[%u]ERROR! state crc 0x%04x - should be 0x%04x\n,i,results[i].crcstate,state_known_crc[known_id]");
+				ee_printf("[%u]ERROR! state crc 0x%04x - should be 0x%04x\n",i,results[i].crcstate,state_known_crc[known_id]);
 				results[i].err++;
 			}
 			total_errors+=results[i].err;
@@ -305,55 +305,55 @@ MAIN_RETURN_TYPE main(int argc, char *argv[]) {
 	total_errors+=check_data_types();
 	/* and report results */
 	//ee_printf("CoreMark Size    : %lu\n", (long unsigned) results[0].size);
-	ee_printf("CoreMark Size    : %lu\n, (long unsigned) results[0].size");
-	ee_printf("Total ticks      : %lu\n, (long unsigned) total_time");
+	ee_printf("CoreMark Size    : %lu\n", (long unsigned) results[0].size);
+	ee_printf("Total ticks      : %lu\n", (long unsigned) total_time);
 #if HAS_FLOAT
-	ee_printf("Total time (secs): %f\n,time_in_secs(total_time)");
+	ee_printf("Total time (secs): %f\n",time_in_secs(total_time));
 	if (time_in_secs(total_time) > 0)
-		ee_printf("Iterations/Sec   : %f\n,default_num_contexts*results[0].iterations/time_in_secs(total_time)");
+		ee_printf("Iterations/Sec   : %f\n",default_num_contexts*results[0].iterations/time_in_secs(total_time));
 #else 
 	ee_printf("Total time (secs): %d\n,time_in_secs(total_time)");
 	if (time_in_secs(total_time) > 0)
-		ee_printf("Iterations/Sec   : %d\n,default_num_contexts*results[0].iterations/time_in_secs(total_time)");
+		ee_printf("Iterations/Sec   : %d\n",default_num_contexts*results[0].iterations/time_in_secs(total_time));
 #endif
 	if (time_in_secs(total_time) < 10) {
 		ee_printf("ERROR! Must execute for at least 10 secs for a valid result!\n");
 		total_errors++;
 	}
 
-	ee_printf("Iterations       : %lu\n, (long unsigned) default_num_contexts*results[0].iterations");
-	ee_printf("Compiler version : %s\n,COMPILER_VERSION");
-	ee_printf("Compiler flags   : %s\n,COMPILER_FLAGS");
+	ee_printf("Iterations       : %lu\n", (long unsigned) default_num_contexts*results[0].iterations);
+	ee_printf("Compiler version : %s\n",COMPILER_VERSION);
+	ee_printf("Compiler flags   : %s\n",COMPILER_FLAGS);
 #if (MULTITHREAD>1)
-	ee_printf("Parallel %s : %d\n,PARALLEL_METHOD,default_num_contexts");
+	ee_printf("Parallel %s : %d\n",PARALLEL_METHOD,default_num_contexts);
 #endif
-	ee_printf("Memory location  : %s\n,MEM_LOCATION");
+	ee_printf("Memory location  : %s\n",MEM_LOCATION);
 	/* output for verification */
-	ee_printf("seedcrc          : 0x%04x\n,seedcrc");
+	ee_printf("seedcrc          : 0x%04x\n",seedcrc);
 	if (results[0].execs & ID_LIST)
 		for (i=0 ; i<default_num_contexts; i++) 
-			ee_printf("[%d]crclist       : 0x%04x\n,i,results[i].crclist");
+			ee_printf("[%d]crclist       : 0x%04x\n",i,results[i].crclist);
 	if (results[0].execs & ID_MATRIX) 
 		for (i=0 ; i<default_num_contexts; i++) 
-			ee_printf("[%d]crcmatrix     : 0x%04x\n,i,results[i].crcmatrix");
+			ee_printf("[%d]crcmatrix     : 0x%04x\n",i,results[i].crcmatrix);
 	if (results[0].execs & ID_STATE)
 		for (i=0 ; i<default_num_contexts; i++) 
-			ee_printf("[%d]crcstate      : 0x%04x\n,i,results[i].crcstate");
+			ee_printf("[%d]crcstate      : 0x%04x\n",i,results[i].crcstate);
 	for (i=0 ; i<default_num_contexts; i++) 
-		ee_printf("[%d]crcfinal      : 0x%04x\n,i,results[i].crc");
+		ee_printf("[%d]crcfinal      : 0x%04x\"n",i,results[i].crc);
 	if (total_errors==0) {
 		ee_printf("Correct operation validated. See README.md for run and reporting rules.\n");
 #if HAS_FLOAT
 		if (known_id==3) {
-			ee_printf("CoreMark 1.0 : %f / %s %s,default_num_contexts*results[0].iterations/time_in_secs(total_time),COMPILER_VERSION,COMPILER_FLAGS");
+			ee_printf("CoreMark 1.0 : %f / %s %s",default_num_contexts*results[0].iterations/time_in_secs(total_time),COMPILER_VERSION,COMPILER_FLAGS);
 #if defined(MEM_LOCATION) && !defined(MEM_LOCATION_UNSPEC)
-			ee_printf(" / %s,MEM_LOCATION");
+			ee_printf(" / %s",MEM_LOCATION);
 #else
-			ee_printf(" / %s,mem_name[MEM_METHOD]");
+			ee_printf(" / %s",mem_name[MEM_METHOD]);
 #endif
 
 #if (MULTITHREAD>1)
-			ee_printf(" / %d:%s,default_num_contexts,PARALLEL_METHOD");
+			ee_printf(" / %d:%s",default_num_contexts,PARALLEL_METHOD);
 #endif
 			ee_printf("\n");
 		}
diff --git a/wally-pipelined/config/buildroot/wally-config.vh b/wally-pipelined/config/buildroot/wally-config.vh
index 826f560f..065a6ebc 100644
--- a/wally-pipelined/config/buildroot/wally-config.vh
+++ b/wally-pipelined/config/buildroot/wally-config.vh
@@ -1,5 +1,5 @@
 //////////////////////////////////////////
-// busybear-config.vh
+// wally-config.vh
 //
 // Written: David_Harris@hmc.edu 4 January 2021
 // Modified: 
@@ -61,22 +61,27 @@
 // Peripheral Addresses
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
-
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define CLINTBASE     32'h02000000
-`define CLINTRANGE    32'h0000FFFF
-`define PLICBASE      32'h0C000000
-`define PLICRANGE     32'h03FFFFFF
-`define UARTBASE      32'h10000000
-`define UARTRANGE     32'h00000007
-`define VBD0BASE      32'h10001000
-`define VBD0RANGE     32'h000001FF
-// differing from Imperas' OVPSim by not having a VND0
-`define GPIOBASE      32'h20000000 
-`define GPIORANGE     32'h000000FF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
 `define TIMBASE       32'h80000000
 `define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
+`define CLINTBASE  32'h02000000
+`define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
+`define GPIOBASE   32'h10012000
+`define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
+`define UARTBASE   32'h10000000
+`define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
+`define PLICBASE   32'h0C000000
+`define PLICRANGE  32'h03FFFFFF
+
 // Bus Interface width
 `define AHBW 64
 
diff --git a/wally-pipelined/config/busybear/wally-config.vh b/wally-pipelined/config/busybear/wally-config.vh
index ce189ff1..da7db228 100644
--- a/wally-pipelined/config/busybear/wally-config.vh
+++ b/wally-pipelined/config/busybear/wally-config.vh
@@ -62,21 +62,27 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define CLINTBASE     32'h02000000
-`define CLINTRANGE    32'h0000FFFF
-`define PLICBASE      32'h0C000000
-`define PLICRANGE     32'h03FFFFFF
-`define UARTBASE      32'h10000000
-`define UARTRANGE     32'h00000007
-`define VBD0BASE      32'h10001000
-`define VBD0RANGE     32'h000001FF
-// differing from Imperas' OVPSim by not having a VND0
-`define GPIOBASE      32'h20000000 
-`define GPIORANGE     32'h000000FF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
 `define TIMBASE       32'h80000000
 `define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
+`define CLINTBASE  32'h02000000
+`define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
+`define GPIOBASE   32'h10012000
+`define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
+`define UARTBASE   32'h10000000
+`define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
+`define PLICBASE   32'h0C000000
+`define PLICRANGE  32'h03FFFFFF
+
 // Bus Interface width
 `define AHBW 64
 
diff --git a/wally-pipelined/config/coremark-64i/wally-config.vh b/wally-pipelined/config/coremark-64i/wally-config.vh
index 2ac36a2a..848cb3bc 100644
--- a/wally-pipelined/config/coremark-64i/wally-config.vh
+++ b/wally-pipelined/config/coremark-64i/wally-config.vh
@@ -54,14 +54,26 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
-`define TIMBASE    32'h80000000
-`define TIMRANGE   32'h0007FFFF
+`define BOOTTIMSUPPORTED 1'b1
+`define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+`define BOOTTIMRANGE  32'h00003FFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
+`define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
+`define PLICBASE   32'h0C000000
+`define PLICRANGE  32'h03FFFFFF
 
 // Test modes
 
diff --git a/wally-pipelined/config/coremark/wally-config.vh b/wally-pipelined/config/coremark/wally-config.vh
index d5935665..615e1802 100644
--- a/wally-pipelined/config/coremark/wally-config.vh
+++ b/wally-pipelined/config/coremark/wally-config.vh
@@ -62,16 +62,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define TIMBASE    32'h00000000
-`define TIMRANGE   32'hFFFFFFFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
+`define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/coremark_bare/wally-config.vh b/wally-pipelined/config/coremark_bare/wally-config.vh
index 2a9a6c4c..219e4225 100644
--- a/wally-pipelined/config/coremark_bare/wally-config.vh
+++ b/wally-pipelined/config/coremark_bare/wally-config.vh
@@ -62,16 +62,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define TIMBASE    32'h80000000
-`define TIMRANGE   32'h000FFFFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
+`define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh
index 7bbe713a..6f17e259 100644
--- a/wally-pipelined/config/rv32ic/wally-config.vh
+++ b/wally-pipelined/config/rv32ic/wally-config.vh
@@ -61,16 +61,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
 `define TIMBASE       32'h80000000
 `define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/rv64BP/wally-config.vh b/wally-pipelined/config/rv64BP/wally-config.vh
index 6cc8ce73..0cf38f28 100644
--- a/wally-pipelined/config/rv64BP/wally-config.vh
+++ b/wally-pipelined/config/rv64BP/wally-config.vh
@@ -63,16 +63,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define TIMBASE       32'h00000000
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
 `define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh
index 1c94adf0..d9928cdb 100644
--- a/wally-pipelined/config/rv64ic/wally-config.vh
+++ b/wally-pipelined/config/rv64ic/wally-config.vh
@@ -65,18 +65,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
 //`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 //`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
 `define TIMBASE       32'h80000000
 `define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/rv64icfd/wally-config.vh b/wally-pipelined/config/rv64icfd/wally-config.vh
index 0b0726be..20da468c 100644
--- a/wally-pipelined/config/rv64icfd/wally-config.vh
+++ b/wally-pipelined/config/rv64icfd/wally-config.vh
@@ -65,17 +65,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
-`define BOOTTIMBASE   32'h00000000
+`define BOOTTIMSUPPORTED 1'b1
+`define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define TIMBASE    32'h80000000
-// `define TIMRANGE   32'h0007FFFF
-`define TIMRANGE   32'h07FFFFFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
+`define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/config/rv64imc/wally-config.vh b/wally-pipelined/config/rv64imc/wally-config.vh
index be0970de..5e63f6da 100644
--- a/wally-pipelined/config/rv64imc/wally-config.vh
+++ b/wally-pipelined/config/rv64imc/wally-config.vh
@@ -61,16 +61,24 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 
+`define BOOTTIMSUPPORTED 1'b1
 `define BOOTTIMBASE   32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
 `define BOOTTIMRANGE  32'h00003FFF
-`define TIMBASE    32'h80000000
-`define TIMRANGE   32'h0007FFFF
+//`define BOOTTIMBASE   32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+//`define BOOTTIMRANGE  32'h00000FFF
+`define TIMSUPPORTED 1'b1
+`define TIMBASE       32'h80000000
+`define TIMRANGE      32'h07FFFFFF
+`define CLINTSUPPORTED 1'b1
 `define CLINTBASE  32'h02000000
 `define CLINTRANGE 32'h0000FFFF
+`define GPIOSUPPORTED 1'b1
 `define GPIOBASE   32'h10012000
 `define GPIORANGE  32'h000000FF
+`define UARTSUPPORTED 1'b1
 `define UARTBASE   32'h10000000
 `define UARTRANGE  32'h00000007
+`define PLICSUPPORTED 1'b1
 `define PLICBASE   32'h0C000000
 `define PLICRANGE  32'h03FFFFFF
 
diff --git a/wally-pipelined/src/mmu/pmaadrdec.sv b/wally-pipelined/src/mmu/pmaadrdec.sv
new file mode 100644
index 00000000..a133503b
--- /dev/null
+++ b/wally-pipelined/src/mmu/pmaadrdec.sv
@@ -0,0 +1,48 @@
+///////////////////////////////////////////
+// pmaadrdec.sv
+//
+// Written: David_Harris@hmc.edu 29 January 2021
+// Modified: 
+//
+// Purpose: Address decoder
+// 
+// A component of the Wally configurable RISC-V project.
+// 
+// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
+// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, 
+// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software 
+// is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 
+// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 
+// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT 
+// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+///////////////////////////////////////////
+
+`include "wally-config.vh"
+
+module pmaadrdec (
+  input  logic [31:0] HADDR,
+  input  logic [31:0] Base, Range,
+  input  logic        Supported,
+  input  logic        AccessValid,
+  input  logic [2:0]  Size,
+  input  logic [3:0]  SizeMask,
+  output logic        HSEL
+);
+
+  logic match;
+
+  // determine if an address is in a range starting at the base
+  // for example, if Base = 0x04002000 and range = 0x00000FFF,
+  // then anything address between 0x04002000 and 0x04002FFF should match (HSEL=1)
+
+  assign match = &((HADDR ~^ Base) | Range);
+  assign HSEL = match & Supported;
+
+endmodule
+
diff --git a/wally-pipelined/src/mmu/pmachecker.sv b/wally-pipelined/src/mmu/pmachecker.sv
index 61c02426..8821c0cf 100644
--- a/wally-pipelined/src/mmu/pmachecker.sv
+++ b/wally-pipelined/src/mmu/pmachecker.sv
@@ -54,15 +54,30 @@ module pmachecker (
   logic HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC;
   logic ValidBootTim, ValidTim, ValidCLINT, ValidGPIO, ValidUART, ValidPLIC;
 
-  // Attributes of memory region accessed
-  logic Executable, Readable, Writable;
+  logic PMAAccessFault;
+  logic AccessRW, AccessRWX, AccessRX;
 
-  logic Fault;
+  // Determine what type of access is being made
+  assign AccessRW = ReadAccessM | WriteAccessM;
+  assign AccessRWX = ReadAccessM | WriteAccessM | ExecuteAccessF;
+  assign AccessRX = ReadAccessM | ExecuteAccessF;
 
-  attributes attributes(.Address(HADDR), .*);
 
-  // Unswizzle region bits
-  assign {BootTim, Tim, CLINT, GPIO, UART, PLIC} = Regions;
+  // Determine which region of physical memory (if any) is being accessed
+  pmaadrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, `BOOTTIMSUPPORTED, AccessRX, HSIZE, 4'b1111, BootTim);
+  pmaadrdec timdec(HADDR, `TIMBASE, `TIMRANGE, `TIMSUPPORTED, AccessRWX, HSIZE, 4'b1111, Tim);
+  pmaadrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, `CLINTSUPPORTED, AccessRW, HSIZE, (`XLEN==64 ? 4'b1000 : 4'b0100), CLINT);
+  pmaadrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, `GPIOSUPPORTED, AccessRW, HSIZE, 4'b0100, GPIO);
+  pmaadrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, `UARTSUPPORTED, AccessRW, HSIZE, 4'b0001, UART);
+  pmaadrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, `PLICSUPPORTED, AccessRW, HSIZE, 4'b0100, PLIC);
+
+  // Swizzle region bits
+  assign Regions = {BootTim, Tim, CLINT, GPIO, UART, PLIC};
+
+  // Only RAM memory regions are cacheable
+  assign Cacheable = BootTim | Tim;
+  assign Idempotent = Tim;
+  assign AtomicAllowed = Tim;
 
   assign ValidBootTim = '1;
   assign ValidTim = '1;
@@ -81,50 +96,11 @@ module pmachecker (
   // Swizzle region bits
   assign HSELRegions = {HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC};
 
-  assign Fault = ~|HSELRegions;
-
-  assign PMAInstrAccessFaultF = ExecuteAccessF && Fault;
-  assign PMALoadAccessFaultM  = ReadAccessM    && Fault;
-  assign PMAStoreAccessFaultM = WriteAccessM   && Fault;
-
-  assign PMASquashBusAccess = PMAInstrAccessFaultF || PMALoadAccessFaultM || PMAStoreAccessFaultM;
-
-endmodule
-
-module attributes (
-//  input  logic        clk, reset, // *** unused in this module and all sub modules.
-
-  input  logic [31:0] Address,
-
-  output logic [5:0]  Regions,
-
-  output logic        Cacheable, Idempotent, AtomicAllowed,
-  output logic        Executable, Readable, Writable
-);
-
-  // Signals are high if the memory access is within the given region
-  logic BootTim, Tim, CLINT, GPIO, UART, PLIC;
-
-  // Determine which region of physical memory (if any) is being accessed
-  adrdec boottimdec(Address, `BOOTTIMBASE, `BOOTTIMRANGE, BootTim);
-  adrdec timdec(Address, `TIMBASE, `TIMRANGE, Tim);
-  adrdec clintdec(Address, `CLINTBASE, `CLINTRANGE, CLINT);
-  adrdec gpiodec(Address, `GPIOBASE, `GPIORANGE, GPIO);
-  adrdec uartdec(Address, `UARTBASE, `UARTRANGE, UART);
-  adrdec plicdec(Address, `PLICBASE, `PLICRANGE, PLIC);
-
-  // Swizzle region bits
-  assign Regions = {BootTim, Tim, CLINT, GPIO, UART, PLIC};
-
-  // Only RAM memory regions are cacheable
-  assign Cacheable = BootTim | Tim;
-
-  assign Idempotent = BootTim | Tim;
-
-  assign AtomicAllowed = BootTim | Tim;
-
-  assign Executable = BootTim | Tim;
-  assign Readable = BootTim | Tim | CLINT | GPIO | UART | PLIC;
-  assign Writable = BootTim | Tim | CLINT | GPIO | UART | PLIC;
+  assign PMAAccessFault = ~|HSELRegions;
 
+  // Detect access faults
+  assign PMAInstrAccessFaultF = ExecuteAccessF && PMAAccessFault;
+  assign PMALoadAccessFaultM  = ReadAccessM    && PMAAccessFault;
+  assign PMAStoreAccessFaultM = WriteAccessM   && PMAAccessFault;
+  assign PMASquashBusAccess = PMAAccessFault && AccessRWX;
 endmodule