diff --git a/.gitignore b/.gitignore index 422035ba..d360b8fb 100644 --- a/.gitignore +++ b/.gitignore @@ -1,4 +1,5 @@ -**/work +**/work* +**/wally_*.log #vsim work files to ignore transcript diff --git a/wally-pipelined/regression/wally-pipelined-batch-parallel.do b/wally-pipelined/regression/wally-pipelined-batch-parallel.do index 44974734..8c057004 100644 --- a/wally-pipelined/regression/wally-pipelined-batch-parallel.do +++ b/wally-pipelined/regression/wally-pipelined-batch-parallel.do @@ -18,8 +18,8 @@ onbreak {resume} # create library -if [file exists work] { - vdel -all +if [file exists work$2] { + vdel -lib work$2 -all } vlib work$2 diff --git a/wally-pipelined/testbench/testbench-busybear.sv b/wally-pipelined/testbench/testbench-busybear.sv index 6d741fbd..920a2044 100644 --- a/wally-pipelined/testbench/testbench-busybear.sv +++ b/wally-pipelined/testbench/testbench-busybear.sv @@ -162,21 +162,33 @@ module testbench_busybear(); end end - string CSRname; - logic [63:0] expectedCSR; - //CSR checking - always @(dut.priv.MTVEC_REGW) begin - if ($time != 1) begin - scan_file_csr = $fscanf(data_file_csr, "%s\n", CSRname); - scan_file_csr = $fscanf(data_file_csr, "%x\n", expectedCSR); - if(CSRname != "mtvec") begin - $display("%t ps, instr %0d: MTVEC changed, expected %s", $time, instrs, CSRname); - end - if(dut.priv.MTVEC_REGW != expectedCSR) begin - $display("%t ps, instr %0d: %s does not equal %s expected: %x, %x", $time, instrs, CSRname, CSRname, dut.priv.MTVEC_REGW, expectedCSR); - end - end - end + `define CHECK_CSR(CSR) \ + string CSR; \ + logic [63:0] expected``CSR``; \ + //CSR checking \ + always @(dut.priv.csr.``CSR``_REGW) begin \ + if ($time > 1) begin \ + scan_file_csr = $fscanf(data_file_csr, "%s\n", CSR); \ + scan_file_csr = $fscanf(data_file_csr, "%x\n", expected``CSR``); \ + if(CSR.icompare(`"CSR`")) begin \ + $display("%t ps, instr %0d: %s changed, expected %s", $time, instrs, `"CSR`", CSR); \ + end \ + if(dut.priv.csr.``CSR``_REGW != ``expected``CSR) begin \ + $display("%t ps, instr %0d: %s does not equal %s expected: %x, %x", $time, instrs, CSR, CSR, dut.priv.csr.``CSR``_REGW, ``expected``CSR); \ + end \ + end \ + end + + //`CHECK_CSR(FCSR) + `CHECK_CSR(MCOUNTEREN) + `CHECK_CSR(MEDELEG) + `CHECK_CSR(MIDELEG) + `CHECK_CSR(MIE) + //`CHECK_CSR(MSCRATCH) + `CHECK_CSR(MSTATUS) + `CHECK_CSR(MTVEC) + //`CHECK_CSR(SATP) + `CHECK_CSR(SCOUNTEREN) logic speculative; initial begin