From e0e30c1e9ef898a5e6d22c2725507664b8114f9d Mon Sep 17 00:00:00 2001 From: "James E. Stine" Date: Fri, 14 Jan 2022 09:25:37 -0600 Subject: [PATCH] Update to TestFloat for scripts so can run automatically once TestFloat/Softfloat is compiled. Slight change to the README as well. --- pipelined/testbench/fp/README.md | 33 ++++-- pipelined/testbench/fp/case.sh | 2 + pipelined/testbench/fp/create_vectors16.csh | 22 ---- pipelined/testbench/fp/create_vectors16.sh | 41 ++++--- pipelined/testbench/fp/create_vectors32.csh | 20 ---- pipelined/testbench/fp/create_vectors32.sh | 41 ++++--- .../testbench/fp/create_vectors32_64.csh | 16 --- pipelined/testbench/fp/create_vectors32_64.sh | 28 ++--- .../testbench/fp/create_vectors32cmp.csh | 9 -- pipelined/testbench/fp/create_vectors32cmp.sh | 16 +-- pipelined/testbench/fp/create_vectors64.csh | 20 ---- pipelined/testbench/fp/create_vectors64.sh | 42 +++++--- .../testbench/fp/create_vectors64_32.csh | 18 ---- pipelined/testbench/fp/create_vectors64_32.sh | 28 ++--- .../testbench/fp/create_vectors64cmp.csh | 9 -- pipelined/testbench/fp/create_vectors64cmp.sh | 16 +-- pipelined/testbench/fp/create_vectorsi.csh | 41 ------- pipelined/testbench/fp/create_vectorsi.sh | 100 +++++++++--------- pipelined/testbench/fp/run_all.sh | 1 + 19 files changed, 206 insertions(+), 297 deletions(-) create mode 100755 pipelined/testbench/fp/case.sh delete mode 100755 pipelined/testbench/fp/create_vectors16.csh delete mode 100755 pipelined/testbench/fp/create_vectors32.csh delete mode 100755 pipelined/testbench/fp/create_vectors32_64.csh delete mode 100755 pipelined/testbench/fp/create_vectors32cmp.csh delete mode 100755 pipelined/testbench/fp/create_vectors64.csh delete mode 100755 pipelined/testbench/fp/create_vectors64_32.csh delete mode 100755 pipelined/testbench/fp/create_vectors64cmp.csh delete mode 100755 pipelined/testbench/fp/create_vectorsi.csh diff --git a/pipelined/testbench/fp/README.md b/pipelined/testbench/fp/README.md index c65d6e89..3508bcee 100644 --- a/pipelined/testbench/fp/README.md +++ b/pipelined/testbench/fp/README.md @@ -1,3 +1,5 @@ +james.stine@okstate.edu 14 Jan 2022 + These are the testvectors (TV) to test the floating-point units using Berkeley TestFloat written originally by John Hauser. TestFloat requires both TestFloat and SoftFloat. @@ -12,6 +14,12 @@ createX.sh (e.g., create_vectors32.sh) has been included that create the TV for each rounding mode and operation. These scripts must be run in the build directory of TestFloat. +A set of scripts is also include that runs everything from the +baseline directory. Please change the BUILD and OUTPUT variable to +change your baseline program where its compiled and where you want to +output the vectors. By default, the vectors are output into the +vectors subdirectory. + After each TV has been created a script (included) is run called undy.sh that puts an underscore between vector to allow SystemVerilog readmemh to read correctly. @@ -21,15 +29,15 @@ readmemh to read correctly. To remove all the underscores from all the TV files, one can run the command that will add underscores appropriately to all the files. -sed -i 's/ /_/g' *.tv +cd vectors +../undy.sh \* Note: due to size, the fxx_fma_xx.tv vectors are not included. However, they can easily be created with the create scripts. -James Stine -10/7/2021 - -List of TestVectors (TV) and sizes +Although not needed, a case.sh script is included to change the case +of the hex output. This is for those that do not like to see +hexadecimal capitalized :P. 46464 185856 836352 f16_add_rd.tv 46464 185856 836352 f16_add_rne.tv @@ -39,6 +47,10 @@ List of TestVectors (TV) and sizes 46464 185856 836352 f16_div_rne.tv 46464 185856 836352 f16_div_ru.tv 46464 185856 836352 f16_div_rz.tv + 46464 185856 836352 f16_mul_rd.tv + 46464 185856 836352 f16_mul_rne.tv + 46464 185856 836352 f16_mul_ru.tv + 46464 185856 836352 f16_mul_rz.tv 408 1224 5304 f16_sqrt_rd.tv 408 1224 5304 f16_sqrt_rne.tv 408 1224 5304 f16_sqrt_ru.tv @@ -73,10 +85,10 @@ List of TestVectors (TV) and sizes 600 1800 17400 f32_i64_rne.tv 600 1800 17400 f32_i64_ru.tv 600 1800 17400 f32_i64_rz.tv - 46464 46464 1393920 f32_mul_rd.tv - 46464 46464 1393920 f32_mul_rne.tv - 46464 46464 1393920 f32_mul_ru.tv - 46464 46464 1393920 f32_mul_rz.tv + 46464 185856 1393920 f32_mul_rd.tv + 46464 185856 1393920 f32_mul_rne.tv + 46464 185856 1393920 f32_mul_ru.tv + 46464 185856 1393920 f32_mul_rz.tv 600 1800 12600 f32_sqrt_rd.tv 600 1800 12600 f32_sqrt_rne.tv 600 1800 12600 f32_sqrt_ru.tv @@ -171,4 +183,5 @@ List of TestVectors (TV) and sizes 756 2268 27972 ui64_f64_rne.tv 756 2268 27972 ui64_f64_ru.tv 756 2268 27972 ui64_f64_rz.tv - 2654496 10007904 91305888 total + 2840352 11308896 94651296 total + diff --git a/pipelined/testbench/fp/case.sh b/pipelined/testbench/fp/case.sh new file mode 100755 index 00000000..879156ad --- /dev/null +++ b/pipelined/testbench/fp/case.sh @@ -0,0 +1,2 @@ +#!/bin/sh +sed -i 's/[A-Z]/\L&/g' $1 diff --git a/pipelined/testbench/fp/create_vectors16.csh b/pipelined/testbench/fp/create_vectors16.csh deleted file mode 100755 index 9ce53321..00000000 --- a/pipelined/testbench/fp/create_vectors16.csh +++ /dev/null @@ -1,22 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even f16_add > f16_add_rne.tv -./testfloat_gen -rminMag f16_add > f16_add_rz.tv -./testfloat_gen -rmin f16_add > f16_add_ru.tv -./testfloat_gen -rmax f16_add > f16_add_rd.tv - -./testfloat_gen -rnear_even f16_sub > f16_sub_rne.tv -./testfloat_gen -rminMag f16_sub > f16_sub_rz.tv -./testfloat_gen -rmin f16_sub > f16_sub_ru.tv -./testfloat_gen -rmax f16_sub > f16_sub_rd.tv - -./testfloat_gen -rnear_even f16_div > f16_div_rne.tv -./testfloat_gen -rminMag f16_div > f16_div_rz.tv -./testfloat_gen -rmin f16_div > f16_div_ru.tv -./testfloat_gen -rmax f16_div > f16_div_rd.tv - -./testfloat_gen -rnear_even f16_sqrt > f16_sqrt_rne.tv -./testfloat_gen -rminMag f16_sqrt > f16_sqrt_rz.tv -./testfloat_gen -rmin f16_sqrt > f16_sqrt_ru.tv -./testfloat_gen -rmax f16_sqrt > f16_sqrt_rd.tv - - diff --git a/pipelined/testbench/fp/create_vectors16.sh b/pipelined/testbench/fp/create_vectors16.sh index 9ce53321..5b4d3dc3 100755 --- a/pipelined/testbench/fp/create_vectors16.sh +++ b/pipelined/testbench/fp/create_vectors16.sh @@ -1,22 +1,31 @@ #!/bin/sh -./testfloat_gen -rnear_even f16_add > f16_add_rne.tv -./testfloat_gen -rminMag f16_add > f16_add_rz.tv -./testfloat_gen -rmin f16_add > f16_add_ru.tv -./testfloat_gen -rmax f16_add > f16_add_rd.tv -./testfloat_gen -rnear_even f16_sub > f16_sub_rne.tv -./testfloat_gen -rminMag f16_sub > f16_sub_rz.tv -./testfloat_gen -rmin f16_sub > f16_sub_ru.tv -./testfloat_gen -rmax f16_sub > f16_sub_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even f16_div > f16_div_rne.tv -./testfloat_gen -rminMag f16_div > f16_div_rz.tv -./testfloat_gen -rmin f16_div > f16_div_ru.tv -./testfloat_gen -rmax f16_div > f16_div_rd.tv +$BUILD/testfloat_gen -rnear_even f16_add > $OUTPUT/f16_add_rne.tv +$BUILD/testfloat_gen -rminMag f16_add > $OUTPUT/f16_add_rz.tv +$BUILD/testfloat_gen -rmin f16_add > $OUTPUT/f16_add_ru.tv +$BUILD/testfloat_gen -rmax f16_add > $OUTPUT/f16_add_rd.tv -./testfloat_gen -rnear_even f16_sqrt > f16_sqrt_rne.tv -./testfloat_gen -rminMag f16_sqrt > f16_sqrt_rz.tv -./testfloat_gen -rmin f16_sqrt > f16_sqrt_ru.tv -./testfloat_gen -rmax f16_sqrt > f16_sqrt_rd.tv +$BUILD/testfloat_gen -rnear_even f16_sub > $OUTPUT/f16_sub_rne.tv +$BUILD/testfloat_gen -rminMag f16_sub > $OUTPUT/f16_sub_rz.tv +$BUILD/testfloat_gen -rmin f16_sub > $OUTPUT/f16_sub_ru.tv +$BUILD/testfloat_gen -rmax f16_sub > $OUTPUT/f16_sub_rd.tv + +$BUILD/testfloat_gen -rnear_even f16_div > $OUTPUT/f16_div_rne.tv +$BUILD/testfloat_gen -rminMag f16_div > $OUTPUT/f16_div_rz.tv +$BUILD/testfloat_gen -rmin f16_div > $OUTPUT/f16_div_ru.tv +$BUILD/testfloat_gen -rmax f16_div > $OUTPUT/f16_div_rd.tv + +$BUILD/testfloat_gen -rnear_even f16_sqrt > $OUTPUT/f16_sqrt_rne.tv +$BUILD/testfloat_gen -rminMag f16_sqrt > $OUTPUT/f16_sqrt_rz.tv +$BUILD/testfloat_gen -rmin f16_sqrt > $OUTPUT/f16_sqrt_ru.tv +$BUILD/testfloat_gen -rmax f16_sqrt > $OUTPUT/f16_sqrt_rd.tv + +$BUILD/testfloat_gen -rnear_even f16_mul > $OUTPUT/f16_mul_rne.tv +$BUILD/testfloat_gen -rminMag f16_mul > $OUTPUT/f16_mul_rz.tv +$BUILD/testfloat_gen -rmax f16_mul > $OUTPUT/f16_mul_ru.tv +$BUILD/testfloat_gen -rmin f16_mul > $OUTPUT/f16_mul_rd.tv diff --git a/pipelined/testbench/fp/create_vectors32.csh b/pipelined/testbench/fp/create_vectors32.csh deleted file mode 100755 index 958c3fad..00000000 --- a/pipelined/testbench/fp/create_vectors32.csh +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even f32_add > f32_add_rne.tv -./testfloat_gen -rminMag f32_add > f32_add_rz.tv -./testfloat_gen -rmax f32_add > f32_add_ru.tv -./testfloat_gen -rmin f32_add > f32_add_rd.tv - -./testfloat_gen -rnear_even f32_sub > f32_sub_rne.tv -./testfloat_gen -rminMag f32_sub > f32_sub_rz.tv -./testfloat_gen -rmax f32_sub > f32_sub_ru.tv -./testfloat_gen -rmin f32_sub > f32_sub_rd.tv - -./testfloat_gen -rnear_even f32_div > f32_div_rne.tv -./testfloat_gen -rminMag f32_div > f32_div_rz.tv -./testfloat_gen -rmax f32_div > f32_div_ru.tv -./testfloat_gen -rmin f32_div > f32_div_rd.tv - -./testfloat_gen -rnear_even f32_sqrt > f32_sqrt_rne.tv -./testfloat_gen -rminMag f32_sqrt > f32_sqrt_rz.tv -./testfloat_gen -rmax f32_sqrt > f32_sqrt_ru.tv -./testfloat_gen -rmin f32_sqrt > f32_sqrt_rd.tv diff --git a/pipelined/testbench/fp/create_vectors32.sh b/pipelined/testbench/fp/create_vectors32.sh index 958c3fad..a862de76 100755 --- a/pipelined/testbench/fp/create_vectors32.sh +++ b/pipelined/testbench/fp/create_vectors32.sh @@ -1,20 +1,29 @@ #!/bin/sh -./testfloat_gen -rnear_even f32_add > f32_add_rne.tv -./testfloat_gen -rminMag f32_add > f32_add_rz.tv -./testfloat_gen -rmax f32_add > f32_add_ru.tv -./testfloat_gen -rmin f32_add > f32_add_rd.tv -./testfloat_gen -rnear_even f32_sub > f32_sub_rne.tv -./testfloat_gen -rminMag f32_sub > f32_sub_rz.tv -./testfloat_gen -rmax f32_sub > f32_sub_ru.tv -./testfloat_gen -rmin f32_sub > f32_sub_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even f32_div > f32_div_rne.tv -./testfloat_gen -rminMag f32_div > f32_div_rz.tv -./testfloat_gen -rmax f32_div > f32_div_ru.tv -./testfloat_gen -rmin f32_div > f32_div_rd.tv +$BUILD/testfloat_gen -rnear_even f32_add > $OUTPUT/f32_add_rne.tv +$BUILD/testfloat_gen -rminMag f32_add > $OUTPUT/f32_add_rz.tv +$BUILD/testfloat_gen -rmax f32_add > $OUTPUT/f32_add_ru.tv +$BUILD/testfloat_gen -rmin f32_add > $OUTPUT/f32_add_rd.tv -./testfloat_gen -rnear_even f32_sqrt > f32_sqrt_rne.tv -./testfloat_gen -rminMag f32_sqrt > f32_sqrt_rz.tv -./testfloat_gen -rmax f32_sqrt > f32_sqrt_ru.tv -./testfloat_gen -rmin f32_sqrt > f32_sqrt_rd.tv +$BUILD/testfloat_gen -rnear_even f32_sub > $OUTPUT/f32_sub_rne.tv +$BUILD/testfloat_gen -rminMag f32_sub > $OUTPUT/f32_sub_rz.tv +$BUILD/testfloat_gen -rmax f32_sub > $OUTPUT/f32_sub_ru.tv +$BUILD/testfloat_gen -rmin f32_sub > $OUTPUT/f32_sub_rd.tv + +$BUILD/testfloat_gen -rnear_even f32_div > $OUTPUT/f32_div_rne.tv +$BUILD/testfloat_gen -rminMag f32_div > $OUTPUT/f32_div_rz.tv +$BUILD/testfloat_gen -rmax f32_div > $OUTPUT/f32_div_ru.tv +$BUILD/testfloat_gen -rmin f32_div > $OUTPUT/f32_div_rd.tv + +$BUILD/testfloat_gen -rnear_even f32_sqrt > $OUTPUT/f32_sqrt_rne.tv +$BUILD/testfloat_gen -rminMag f32_sqrt > $OUTPUT/f32_sqrt_rz.tv +$BUILD/testfloat_gen -rmax f32_sqrt > $OUTPUT/f32_sqrt_ru.tv +$BUILD/testfloat_gen -rmin f32_sqrt > $OUTPUT/f32_sqrt_rd.tv + +$BUILD/testfloat_gen -rnear_even f32_mul > $OUTPUT/f32_mul_rne.tv +$BUILD/testfloat_gen -rminMag f32_mul > $OUTPUT/f32_mul_rz.tv +$BUILD/testfloat_gen -rmax f32_mul > $OUTPUT/f32_mul_ru.tv +$BUILD/testfloat_gen -rmin f32_mul > $OUTPUT/f32_mul_rd.tv diff --git a/pipelined/testbench/fp/create_vectors32_64.csh b/pipelined/testbench/fp/create_vectors32_64.csh deleted file mode 100755 index 63ba70d1..00000000 --- a/pipelined/testbench/fp/create_vectors32_64.csh +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even f32_to_f64 > f32_f64_rne.tv -./testfloat_gen -rminMag f32_to_f64 > f32_f64_rz.tv -./testfloat_gen -rmax f32_to_f64 > f32_f64_ru.tv -./testfloat_gen -rmin f32_to_f64 > f32_f64_rd.tv - -./testfloat_gen -rnear_even f32_to_i64 > f32_i64_rne.tv -./testfloat_gen -rminMag f32_to_i64 > f32_i64_rz.tv -./testfloat_gen -rmax f32_to_i64 > f32_i64_ru.tv -./testfloat_gen -rmin f32_to_i64 > f32_i64_rd.tv - -./testfloat_gen -rnear_even f32_to_ui64 > f32_ui64_rne.tv -./testfloat_gen -rminMag f32_to_ui64 > f32_ui64_rz.tv -./testfloat_gen -rmax f32_to_ui64 > f32_ui64_ru.tv -./testfloat_gen -rmin f32_to_ui64 > f32_ui64_rd.tv - diff --git a/pipelined/testbench/fp/create_vectors32_64.sh b/pipelined/testbench/fp/create_vectors32_64.sh index 63ba70d1..57cc763c 100755 --- a/pipelined/testbench/fp/create_vectors32_64.sh +++ b/pipelined/testbench/fp/create_vectors32_64.sh @@ -1,16 +1,20 @@ #!/bin/sh -./testfloat_gen -rnear_even f32_to_f64 > f32_f64_rne.tv -./testfloat_gen -rminMag f32_to_f64 > f32_f64_rz.tv -./testfloat_gen -rmax f32_to_f64 > f32_f64_ru.tv -./testfloat_gen -rmin f32_to_f64 > f32_f64_rd.tv -./testfloat_gen -rnear_even f32_to_i64 > f32_i64_rne.tv -./testfloat_gen -rminMag f32_to_i64 > f32_i64_rz.tv -./testfloat_gen -rmax f32_to_i64 > f32_i64_ru.tv -./testfloat_gen -rmin f32_to_i64 > f32_i64_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even f32_to_ui64 > f32_ui64_rne.tv -./testfloat_gen -rminMag f32_to_ui64 > f32_ui64_rz.tv -./testfloat_gen -rmax f32_to_ui64 > f32_ui64_ru.tv -./testfloat_gen -rmin f32_to_ui64 > f32_ui64_rd.tv +$BUILD/testfloat_gen -rnear_even f32_to_f64 > $OUTPUT/f32_f64_rne.tv +$BUILD/testfloat_gen -rminMag f32_to_f64 > $OUTPUT/f32_f64_rz.tv +$BUILD/testfloat_gen -rmax f32_to_f64 > $OUTPUT/f32_f64_ru.tv +$BUILD/testfloat_gen -rmin f32_to_f64 > $OUTPUT/f32_f64_rd.tv + +$BUILD/testfloat_gen -rnear_even f32_to_i64 > $OUTPUT/f32_i64_rne.tv +$BUILD/testfloat_gen -rminMag f32_to_i64 > $OUTPUT/f32_i64_rz.tv +$BUILD/testfloat_gen -rmax f32_to_i64 > $OUTPUT/f32_i64_ru.tv +$BUILD/testfloat_gen -rmin f32_to_i64 > $OUTPUT/f32_i64_rd.tv + +$BUILD/testfloat_gen -rnear_even f32_to_ui64 > $OUTPUT/f32_ui64_rne.tv +$BUILD/testfloat_gen -rminMag f32_to_ui64 > $OUTPUT/f32_ui64_rz.tv +$BUILD/testfloat_gen -rmax f32_to_ui64 > $OUTPUT/f32_ui64_ru.tv +$BUILD/testfloat_gen -rmin f32_to_ui64 > $OUTPUT/f32_ui64_rd.tv diff --git a/pipelined/testbench/fp/create_vectors32cmp.csh b/pipelined/testbench/fp/create_vectors32cmp.csh deleted file mode 100755 index d7356d3f..00000000 --- a/pipelined/testbench/fp/create_vectors32cmp.csh +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -./testfloat_gen f32_eq > f32_cmp_eq.tv -./testfloat_gen f32_le > f32_cmp_le.tv -./testfloat_gen f32_lt > f32_cmp_lt.tv - -./testfloat_gen f32_eq_signaling > f32_cmp_eq_signaling.tv -./testfloat_gen f32_le_quiet > f32_cmp_le_quiet.tv -./testfloat_gen f32_lt_quiet > f32_cmp_lt_quiet.tv - diff --git a/pipelined/testbench/fp/create_vectors32cmp.sh b/pipelined/testbench/fp/create_vectors32cmp.sh index d7356d3f..49fd041e 100755 --- a/pipelined/testbench/fp/create_vectors32cmp.sh +++ b/pipelined/testbench/fp/create_vectors32cmp.sh @@ -1,9 +1,13 @@ #!/bin/sh -./testfloat_gen f32_eq > f32_cmp_eq.tv -./testfloat_gen f32_le > f32_cmp_le.tv -./testfloat_gen f32_lt > f32_cmp_lt.tv -./testfloat_gen f32_eq_signaling > f32_cmp_eq_signaling.tv -./testfloat_gen f32_le_quiet > f32_cmp_le_quiet.tv -./testfloat_gen f32_lt_quiet > f32_cmp_lt_quiet.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" + +$BUILD/testfloat_gen f32_eq > $OUTPUT/f32_cmp_eq.tv +$BUILD/testfloat_gen f32_le > $OUTPUT/f32_cmp_le.tv +$BUILD/testfloat_gen f32_lt > $OUTPUT/f32_cmp_lt.tv + +$BUILD/testfloat_gen f32_eq_signaling > $OUTPUT/f32_cmp_eq_signaling.tv +$BUILD/testfloat_gen f32_le_quiet > $OUTPUT/f32_cmp_le_quiet.tv +$BUILD/testfloat_gen f32_lt_quiet > $OUTPUT/f32_cmp_lt_quiet.tv diff --git a/pipelined/testbench/fp/create_vectors64.csh b/pipelined/testbench/fp/create_vectors64.csh deleted file mode 100755 index fb4f3cef..00000000 --- a/pipelined/testbench/fp/create_vectors64.csh +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even f64_add > f64_add_rne.tv -./testfloat_gen -rminMag f64_add > f64_add_rz.tv -./testfloat_gen -rmax f64_add > f64_add_ru.tv -./testfloat_gen -rmin f64_add > f64_add_rd.tv - -./testfloat_gen -rnear_even f64_sub > f64_sub_rne.tv -./testfloat_gen -rminMag f64_sub > f64_sub_rz.tv -./testfloat_gen -rmax f64_sub > f64_sub_ru.tv -./testfloat_gen -rmin f64_sub > f64_sub_rd.tv - -./testfloat_gen -rnear_even f64_div > f64_div_rne.tv -./testfloat_gen -rminMag f64_div > f64_div_rz.tv -./testfloat_gen -rmax f64_div > f64_div_ru.tv -./testfloat_gen -rmin f64_div > f64_div_rd.tv - -./testfloat_gen -rnear_even f64_sqrt > f64_sqrt_rne.tv -./testfloat_gen -rminMag f64_sqrt > f64_sqrt_rz.tv -./testfloat_gen -rmax f64_sqrt > f64_sqrt_ru.tv -./testfloat_gen -rmin f64_sqrt > f64_sqrt_rd.tv diff --git a/pipelined/testbench/fp/create_vectors64.sh b/pipelined/testbench/fp/create_vectors64.sh index fb4f3cef..d3466619 100755 --- a/pipelined/testbench/fp/create_vectors64.sh +++ b/pipelined/testbench/fp/create_vectors64.sh @@ -1,20 +1,30 @@ #!/bin/sh -./testfloat_gen -rnear_even f64_add > f64_add_rne.tv -./testfloat_gen -rminMag f64_add > f64_add_rz.tv -./testfloat_gen -rmax f64_add > f64_add_ru.tv -./testfloat_gen -rmin f64_add > f64_add_rd.tv -./testfloat_gen -rnear_even f64_sub > f64_sub_rne.tv -./testfloat_gen -rminMag f64_sub > f64_sub_rz.tv -./testfloat_gen -rmax f64_sub > f64_sub_ru.tv -./testfloat_gen -rmin f64_sub > f64_sub_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even f64_div > f64_div_rne.tv -./testfloat_gen -rminMag f64_div > f64_div_rz.tv -./testfloat_gen -rmax f64_div > f64_div_ru.tv -./testfloat_gen -rmin f64_div > f64_div_rd.tv +$BUILD/testfloat_gen -rnear_even f64_add > $OUTPUT/f64_add_rne.tv +$BUILD/testfloat_gen -rminMag f64_add > $OUTPUT/f64_add_rz.tv +$BUILD/testfloat_gen -rmax f64_add > $OUTPUT/f64_add_ru.tv +$BUILD/testfloat_gen -rmin f64_add > $OUTPUT/f64_add_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_sub > $OUTPUT/f64_sub_rne.tv +$BUILD/testfloat_gen -rminMag f64_sub > $OUTPUT/f64_sub_rz.tv +$BUILD/testfloat_gen -rmax f64_sub > $OUTPUT/f64_sub_ru.tv +$BUILD/testfloat_gen -rmin f64_sub > $OUTPUT/f64_sub_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_div > $OUTPUT/f64_div_rne.tv +$BUILD/testfloat_gen -rminMag f64_div > $OUTPUT/f64_div_rz.tv +$BUILD/testfloat_gen -rmax f64_div > $OUTPUT/f64_div_ru.tv +$BUILD/testfloat_gen -rmin f64_div > $OUTPUT/f64_div_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_sqrt > $OUTPUT/f64_sqrt_rne.tv +$BUILD/testfloat_gen -rminMag f64_sqrt > $OUTPUT/f64_sqrt_rz.tv +$BUILD/testfloat_gen -rmax f64_sqrt > $OUTPUT/f64_sqrt_ru.tv +$BUILD/testfloat_gen -rmin f64_sqrt > $OUTPUT/f64_sqrt_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_mul > $OUTPUT/f64_mul_rne.tv +$BUILD/testfloat_gen -rminMag f64_mul > $OUTPUT/f64_mul_rz.tv +$BUILD/testfloat_gen -rmax f64_mul > $OUTPUT/f64_mul_ru.tv +$BUILD/testfloat_gen -rmin f64_mul > $OUTPUT/f64_mul_rd.tv -./testfloat_gen -rnear_even f64_sqrt > f64_sqrt_rne.tv -./testfloat_gen -rminMag f64_sqrt > f64_sqrt_rz.tv -./testfloat_gen -rmax f64_sqrt > f64_sqrt_ru.tv -./testfloat_gen -rmin f64_sqrt > f64_sqrt_rd.tv diff --git a/pipelined/testbench/fp/create_vectors64_32.csh b/pipelined/testbench/fp/create_vectors64_32.csh deleted file mode 100755 index 45f05405..00000000 --- a/pipelined/testbench/fp/create_vectors64_32.csh +++ /dev/null @@ -1,18 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even f64_to_f32 > f64_f32_rne.tv -./testfloat_gen -rminMag f64_to_f32 > f64_f32_rz.tv -./testfloat_gen -rmax f64_to_f32 > f64_f32_ru.tv -./testfloat_gen -rmin f64_to_f32 > f64_f32_rd.tv - -./testfloat_gen -rnear_even f64_to_i32 > f64_i32_rne.tv -./testfloat_gen -rminMag f64_to_i32 > f64_i32_rz.tv -./testfloat_gen -rmax f64_to_i32 > f64_i32_ru.tv -./testfloat_gen -rmin f64_to_i32 > f64_i32_rd.tv - -./testfloat_gen -rnear_even f64_to_ui32 > f64_ui32_rne.tv -./testfloat_gen -rminMag f64_to_ui32 > f64_ui32_rz.tv -./testfloat_gen -rmax f64_to_ui32 > f64_ui32_ru.tv -./testfloat_gen -rmin f64_to_ui32 > f64_ui32_rd.tv - - - diff --git a/pipelined/testbench/fp/create_vectors64_32.sh b/pipelined/testbench/fp/create_vectors64_32.sh index 45f05405..a1c45f21 100755 --- a/pipelined/testbench/fp/create_vectors64_32.sh +++ b/pipelined/testbench/fp/create_vectors64_32.sh @@ -1,18 +1,22 @@ #!/bin/sh -./testfloat_gen -rnear_even f64_to_f32 > f64_f32_rne.tv -./testfloat_gen -rminMag f64_to_f32 > f64_f32_rz.tv -./testfloat_gen -rmax f64_to_f32 > f64_f32_ru.tv -./testfloat_gen -rmin f64_to_f32 > f64_f32_rd.tv -./testfloat_gen -rnear_even f64_to_i32 > f64_i32_rne.tv -./testfloat_gen -rminMag f64_to_i32 > f64_i32_rz.tv -./testfloat_gen -rmax f64_to_i32 > f64_i32_ru.tv -./testfloat_gen -rmin f64_to_i32 > f64_i32_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even f64_to_ui32 > f64_ui32_rne.tv -./testfloat_gen -rminMag f64_to_ui32 > f64_ui32_rz.tv -./testfloat_gen -rmax f64_to_ui32 > f64_ui32_ru.tv -./testfloat_gen -rmin f64_to_ui32 > f64_ui32_rd.tv +$BUILD/testfloat_gen -rnear_even f64_to_f32 > $OUTPUT/f64_f32_rne.tv +$BUILD/testfloat_gen -rminMag f64_to_f32 > $OUTPUT/f64_f32_rz.tv +$BUILD/testfloat_gen -rmax f64_to_f32 > $OUTPUT/f64_f32_ru.tv +$BUILD/testfloat_gen -rmin f64_to_f32 > $OUTPUT/f64_f32_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_to_i32 > $OUTPUT/f64_i32_rne.tv +$BUILD/testfloat_gen -rminMag f64_to_i32 > $OUTPUT/f64_i32_rz.tv +$BUILD/testfloat_gen -rmax f64_to_i32 > $OUTPUT/f64_i32_ru.tv +$BUILD/testfloat_gen -rmin f64_to_i32 > $OUTPUT/f64_i32_rd.tv + +$BUILD/testfloat_gen -rnear_even f64_to_ui32 > $OUTPUT/f64_ui32_rne.tv +$BUILD/testfloat_gen -rminMag f64_to_ui32 > $OUTPUT/f64_ui32_rz.tv +$BUILD/testfloat_gen -rmax f64_to_ui32 > $OUTPUT/f64_ui32_ru.tv +$BUILD/testfloat_gen -rmin f64_to_ui32 > $OUTPUT/f64_ui32_rd.tv diff --git a/pipelined/testbench/fp/create_vectors64cmp.csh b/pipelined/testbench/fp/create_vectors64cmp.csh deleted file mode 100755 index b2f5dd5b..00000000 --- a/pipelined/testbench/fp/create_vectors64cmp.csh +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -./testfloat_gen f64_eq > f64_cmp_eq.tv -./testfloat_gen f64_le > f64_cmp_le.tv -./testfloat_gen f64_lt > f64_cmp_lt.tv - -./testfloat_gen f64_eq_signaling > f64_cmp_eq_signaling.tv -./testfloat_gen f64_le_quiet > f64_cmp_le_quiet.tv -./testfloat_gen f64_lt_quiet > f64_cmp_lt_quiet.tv - diff --git a/pipelined/testbench/fp/create_vectors64cmp.sh b/pipelined/testbench/fp/create_vectors64cmp.sh index b2f5dd5b..ca286caa 100755 --- a/pipelined/testbench/fp/create_vectors64cmp.sh +++ b/pipelined/testbench/fp/create_vectors64cmp.sh @@ -1,9 +1,13 @@ #!/bin/sh -./testfloat_gen f64_eq > f64_cmp_eq.tv -./testfloat_gen f64_le > f64_cmp_le.tv -./testfloat_gen f64_lt > f64_cmp_lt.tv -./testfloat_gen f64_eq_signaling > f64_cmp_eq_signaling.tv -./testfloat_gen f64_le_quiet > f64_cmp_le_quiet.tv -./testfloat_gen f64_lt_quiet > f64_cmp_lt_quiet.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" + +$BUILD/testfloat_gen f64_eq > $OUTPUT/f64_cmp_eq.tv +$BUILD/testfloat_gen f64_le > $OUTPUT/f64_cmp_le.tv +$BUILD/testfloat_gen f64_lt > $OUTPUT/f64_cmp_lt.tv + +$BUILD/testfloat_gen f64_eq_signaling > $OUTPUT/f64_cmp_eq_signaling.tv +$BUILD/testfloat_gen f64_le_quiet > $OUTPUT/f64_cmp_le_quiet.tv +$BUILD/testfloat_gen f64_lt_quiet > $OUTPUT/f64_cmp_lt_quiet.tv diff --git a/pipelined/testbench/fp/create_vectorsi.csh b/pipelined/testbench/fp/create_vectorsi.csh deleted file mode 100755 index f6c24983..00000000 --- a/pipelined/testbench/fp/create_vectorsi.csh +++ /dev/null @@ -1,41 +0,0 @@ -#!/bin/sh -./testfloat_gen -rnear_even -i32_to_f64 > i32_f64_rne.tv -./testfloat_gen -rminMag -i32_to_f64 > i32_f64_rz.tv -./testfloat_gen -rmax -i32_to_f64 > i32_f64_ru.tv -./testfloat_gen -rmin -i32_to_f64 > i32_f64_rd.tv - -./testfloat_gen -rnear_even -i64_to_f64 > i64_f64_rne.tv -./testfloat_gen -rminMag -i64_to_f64 > i64_f64_rz.tv -./testfloat_gen -rmax -i64_to_f64 > i64_f64_ru.tv -./testfloat_gen -rmin -i64_to_f64 > i64_f64_rd.tv - -./testfloat_gen -rnear_even -i32_to_f32 > i32_f32_rne.tv -./testfloat_gen -rminMag -i32_to_f32 > i32_f32_rz.tv -./testfloat_gen -rmax -i32_to_f32 > i32_f32_ru.tv -./testfloat_gen -rmin -i32_to_f32 > i32_f32_rd.tv - -./testfloat_gen -rnear_even -i64_to_f32 > i64_f32_rne.tv -./testfloat_gen -rminMag -i64_to_f32 > i64_f32_rz.tv -./testfloat_gen -rmax -i64_to_f32 > i64_f32_ru.tv -./testfloat_gen -rmin -i64_to_f32 > i64_f32_rd.tv - -./testfloat_gen -rnear_even -ui32_to_f64 > ui32_f64_rne.tv -./testfloat_gen -rminMag -ui32_to_f64 > ui32_f64_rz.tv -./testfloat_gen -rmax -ui32_to_f64 > ui32_f64_ru.tv -./testfloat_gen -rmin -ui32_to_f64 > ui32_f64_rd.tv - -./testfloat_gen -rnear_even -ui64_to_f64 > ui64_f64_rne.tv -./testfloat_gen -rminMag -ui64_to_f64 > ui64_f64_rz.tv -./testfloat_gen -rmax -ui64_to_f64 > ui64_f64_ru.tv -./testfloat_gen -rmin -ui64_to_f64 > ui64_f64_rd.tv - -./testfloat_gen -rnear_even -ui32_to_f32 > ui32_f32_rne.tv -./testfloat_gen -rminMag -ui32_to_f32 > ui32_f32_rz.tv -./testfloat_gen -rmax -ui32_to_f32 > ui32_f32_ru.tv -./testfloat_gen -rmin -ui32_to_f32 > ui32_f32_rd.tv - -./testfloat_gen -rnear_even -ui64_to_f32 > ui64_f32_rne.tv -./testfloat_gen -rminMag -ui64_to_f32 > ui64_f32_rz.tv -./testfloat_gen -rmax -ui64_to_f32 > ui64_f32_ru.tv -./testfloat_gen -rmin -ui64_to_f32 > ui64_f32_rd.tv - diff --git a/pipelined/testbench/fp/create_vectorsi.sh b/pipelined/testbench/fp/create_vectorsi.sh index e6be960d..82654fa1 100755 --- a/pipelined/testbench/fp/create_vectorsi.sh +++ b/pipelined/testbench/fp/create_vectorsi.sh @@ -1,60 +1,64 @@ #!/bin/sh -./testfloat_gen -rnear_even -i32_to_f64 > i32_f64_rne.tv -./testfloat_gen -rminMag -i32_to_f64 > i32_f64_rz.tv -./testfloat_gen -rmax -i32_to_f64 > i32_f64_ru.tv -./testfloat_gen -rmin -i32_to_f64 > i32_f64_rd.tv -./testfloat_gen -rnear_even -i64_to_f64 > i64_f64_rne.tv -./testfloat_gen -rminMag -i64_to_f64 > i64_f64_rz.tv -./testfloat_gen -rmax -i64_to_f64 > i64_f64_ru.tv -./testfloat_gen -rmin -i64_to_f64 > i64_f64_rd.tv +BUILD="./TestFloat-3e/build/Linux-x86_64-GCC" +OUTPUT="./vectors" -./testfloat_gen -rnear_even -i32_to_f32 > i32_f32_rne.tv -./testfloat_gen -rminMag -i32_to_f32 > i32_f32_rz.tv -./testfloat_gen -rmax -i32_to_f32 > i32_f32_ru.tv -./testfloat_gen -rmin -i32_to_f32 > i32_f32_rd.tv +$BUILD/testfloat_gen -rnear_even -i32_to_f64 > $OUTPUT/i32_f64_rne.tv +$BUILD/testfloat_gen -rminMag -i32_to_f64 > $OUTPUT/i32_f64_rz.tv +$BUILD/testfloat_gen -rmax -i32_to_f64 > $OUTPUT/i32_f64_ru.tv +$BUILD/testfloat_gen -rmin -i32_to_f64 > $OUTPUT/i32_f64_rd.tv -./testfloat_gen -rnear_even -f32_to_i32 > f32_i32_rne.tv -./testfloat_gen -rminMag -f32_to_i32 > f32_i32_rz.tv -./testfloat_gen -rmax -f32_to_i32 > f32_i32_ru.tv -./testfloat_gen -rmin -f32_to_i32 > f32_i32_rd.tv +$BUILD/testfloat_gen -rnear_even -i64_to_f64 > $OUTPUT/i64_f64_rne.tv +$BUILD/testfloat_gen -rminMag -i64_to_f64 > $OUTPUT/i64_f64_rz.tv +$BUILD/testfloat_gen -rmax -i64_to_f64 > $OUTPUT/i64_f64_ru.tv +$BUILD/testfloat_gen -rmin -i64_to_f64 > $OUTPUT/i64_f64_rd.tv -./testfloat_gen -rnear_even -f32_to_ui32 > f32_ui32_rne.tv -./testfloat_gen -rminMag -f32_to_ui32 > f32_ui32_rz.tv -./testfloat_gen -rmax -f32_to_ui32 > f32_ui32_ru.tv -./testfloat_gen -rmin -f32_to_ui32 > f32_ui32_rd.tv +$BUILD/testfloat_gen -rnear_even -i32_to_f32 > $OUTPUT/i32_f32_rne.tv +$BUILD/testfloat_gen -rminMag -i32_to_f32 > $OUTPUT/i32_f32_rz.tv +$BUILD/testfloat_gen -rmax -i32_to_f32 > $OUTPUT/i32_f32_ru.tv +$BUILD/testfloat_gen -rmin -i32_to_f32 > $OUTPUT/i32_f32_rd.tv -./testfloat_gen -rnear_even -i64_to_f32 > i64_f32_rne.tv -./testfloat_gen -rminMag -i64_to_f32 > i64_f32_rz.tv -./testfloat_gen -rmax -i64_to_f32 > i64_f32_ru.tv -./testfloat_gen -rmin -i64_to_f32 > i64_f32_rd.tv +$BUILD/testfloat_gen -rnear_even -f32_to_i32 > $OUTPUT/f32_i32_rne.tv +$BUILD/testfloat_gen -rminMag -f32_to_i32 > $OUTPUT/f32_i32_rz.tv +$BUILD/testfloat_gen -rmax -f32_to_i32 > $OUTPUT/f32_i32_ru.tv +$BUILD/testfloat_gen -rmin -f32_to_i32 > $OUTPUT/f32_i32_rd.tv -./testfloat_gen -rnear_even -ui32_to_f64 > ui32_f64_rne.tv -./testfloat_gen -rminMag -ui32_to_f64 > ui32_f64_rz.tv -./testfloat_gen -rmax -ui32_to_f64 > ui32_f64_ru.tv -./testfloat_gen -rmin -ui32_to_f64 > ui32_f64_rd.tv +$BUILD/testfloat_gen -rnear_even -f32_to_ui32 > $OUTPUT/f32_ui32_rne.tv +$BUILD/testfloat_gen -rminMag -f32_to_ui32 > $OUTPUT/f32_ui32_rz.tv +$BUILD/testfloat_gen -rmax -f32_to_ui32 > $OUTPUT/f32_ui32_ru.tv +$BUILD/testfloat_gen -rmin -f32_to_ui32 > $OUTPUT/f32_ui32_rd.tv -./testfloat_gen -rnear_even -ui64_to_f64 > ui64_f64_rne.tv -./testfloat_gen -rminMag -ui64_to_f64 > ui64_f64_rz.tv -./testfloat_gen -rmax -ui64_to_f64 > ui64_f64_ru.tv -./testfloat_gen -rmin -ui64_to_f64 > ui64_f64_rd.tv +$BUILD/testfloat_gen -rnear_even -i64_to_f32 > $OUTPUT/i64_f32_rne.tv +$BUILD/testfloat_gen -rminMag -i64_to_f32 > $OUTPUT/i64_f32_rz.tv +$BUILD/testfloat_gen -rmax -i64_to_f32 > $OUTPUT/i64_f32_ru.tv +$BUILD/testfloat_gen -rmin -i64_to_f32 > $OUTPUT/i64_f32_rd.tv -./testfloat_gen -rnear_even -ui32_to_f32 > ui32_f32_rne.tv -./testfloat_gen -rminMag -ui32_to_f32 > ui32_f32_rz.tv -./testfloat_gen -rmax -ui32_to_f32 > ui32_f32_ru.tv -./testfloat_gen -rmin -ui32_to_f32 > ui32_f32_rd.tv +$BUILD/testfloat_gen -rnear_even -ui32_to_f64 > $OUTPUT/ui32_f64_rne.tv +$BUILD/testfloat_gen -rminMag -ui32_to_f64 > $OUTPUT/ui32_f64_rz.tv +$BUILD/testfloat_gen -rmax -ui32_to_f64 > $OUTPUT/ui32_f64_ru.tv +$BUILD/testfloat_gen -rmin -ui32_to_f64 > $OUTPUT/ui32_f64_rd.tv -./testfloat_gen -rnear_even -ui64_to_f32 > ui64_f32_rne.tv -./testfloat_gen -rminMag -ui64_to_f32 > ui64_f32_rz.tv -./testfloat_gen -rmax -ui64_to_f32 > ui64_f32_ru.tv -./testfloat_gen -rmin -ui64_to_f32 > ui64_f32_rd.tv +$BUILD/testfloat_gen -rnear_even -ui64_to_f64 > $OUTPUT/ui64_f64_rne.tv +$BUILD/testfloat_gen -rminMag -ui64_to_f64 > $OUTPUT/ui64_f64_rz.tv +$BUILD/testfloat_gen -rmax -ui64_to_f64 > $OUTPUT/ui64_f64_ru.tv +$BUILD/testfloat_gen -rmin -ui64_to_f64 > $OUTPUT/ui64_f64_rd.tv -./testfloat_gen -rnear_even -f64_to_i64 > f64_i64_rne.tv -./testfloat_gen -rminMag -f64_to_i64 > f64_i64_rz.tv -./testfloat_gen -rmax -f64_to_i64 > f64_i64_ru.tv -./testfloat_gen -rmin -f64_to_i64 > f64_i64_rd.tv +$BUILD/testfloat_gen -rnear_even -ui32_to_f32 > $OUTPUT/ui32_f32_rne.tv +$BUILD/testfloat_gen -rminMag -ui32_to_f32 > $OUTPUT/ui32_f32_rz.tv +$BUILD/testfloat_gen -rmax -ui32_to_f32 > $OUTPUT/ui32_f32_ru.tv +$BUILD/testfloat_gen -rmin -ui32_to_f32 > $OUTPUT/ui32_f32_rd.tv -./testfloat_gen -rnear_even -f64_to_ui64 > f64_ui64_rne.tv -./testfloat_gen -rminMag -f64_to_ui64 > f64_ui64_rz.tv -./testfloat_gen -rmax -f64_to_ui64 > f64_ui64_ru.tv -./testfloat_gen -rmin -f64_to_ui64 > f64_ui64_rd.tv +$BUILD/testfloat_gen -rnear_even -ui64_to_f32 > $OUTPUT/ui64_f32_rne.tv +$BUILD/testfloat_gen -rminMag -ui64_to_f32 > $OUTPUT/ui64_f32_rz.tv +$BUILD/testfloat_gen -rmax -ui64_to_f32 > $OUTPUT/ui64_f32_ru.tv +$BUILD/testfloat_gen -rmin -ui64_to_f32 > $OUTPUT/ui64_f32_rd.tv + +$BUILD/testfloat_gen -rnear_even -f64_to_i64 > $OUTPUT/f64_i64_rne.tv +$BUILD/testfloat_gen -rminMag -f64_to_i64 > $OUTPUT/f64_i64_rz.tv +$BUILD/testfloat_gen -rmax -f64_to_i64 > $OUTPUT/f64_i64_ru.tv +$BUILD/testfloat_gen -rmin -f64_to_i64 > $OUTPUT/f64_i64_rd.tv + +$BUILD/testfloat_gen -rnear_even -f64_to_ui64 > $OUTPUT/f64_ui64_rne.tv +$BUILD/testfloat_gen -rminMag -f64_to_ui64 > $OUTPUT/f64_ui64_rz.tv +$BUILD/testfloat_gen -rmax -f64_to_ui64 > $OUTPUT/f64_ui64_ru.tv +$BUILD/testfloat_gen -rmin -f64_to_ui64 > $OUTPUT/f64_ui64_rd.tv diff --git a/pipelined/testbench/fp/run_all.sh b/pipelined/testbench/fp/run_all.sh index 56b28e2d..8d2a17ce 100755 --- a/pipelined/testbench/fp/run_all.sh +++ b/pipelined/testbench/fp/run_all.sh @@ -1,4 +1,5 @@ #!/bin/sh + ./create_vectors16.sh ./create_vectors32_64.sh ./create_vectors32cmp.sh