From db933aa7e26c43eba02ff931da4f8a8842a6015c Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 27 Dec 2022 22:14:09 -0800 Subject: [PATCH] fdivsqrtfsm conditional on IDIV --- pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv index 1748f049..0a73b7b5 100644 --- a/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv +++ b/pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv @@ -65,8 +65,10 @@ module fdivsqrtfsm( // terminate immediately on special cases assign FSpecialCaseE = XZeroE | (YZeroE&~SqrtE) | XInfE | YInfE | XNaNE | YNaNE | (XsE&SqrtE); - assign ISpecialCaseE = AZeroE | BZeroE; // *** why is AZeroE part of this. Should other special cases be considered? - assign SpecialCaseE = MDUE ? ISpecialCaseE : FSpecialCaseE; + if (`IDIV_ON_FPU) begin + assign ISpecialCaseE = AZeroE | BZeroE; // *** why is AZeroE part of this. Should other special cases be considered? + assign SpecialCaseE = MDUE ? ISpecialCaseE : FSpecialCaseE; + end else assign SpecialCaseE = FSpecialCaseE; flopenr #(1) SpecialCaseReg(clk, reset, ~StallM, SpecialCaseE, SpecialCaseM); // save SpecialCase for checking in fdivsqrtpostproc // DIVN = `NF+3