From da8eb7749fe9e043600d3735ff04646cc5642c83 Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 17 Jun 2021 16:28:06 -0400 Subject: [PATCH] Started simplifying PMA checker --- wally-pipelined/config/rv32ic/wally-config.vh | 8 ++ wally-pipelined/config/rv64ic/wally-config.vh | 6 ++ wally-pipelined/src/mmu/pmaadrdec.sv | 45 +++++++++++ wally-pipelined/src/mmu/pmachecker.sv | 76 +++++++------------ 4 files changed, 85 insertions(+), 50 deletions(-) create mode 100644 wally-pipelined/src/mmu/pmaadrdec.sv diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh index 7bbe713a..6f17e259 100644 --- a/wally-pipelined/config/rv32ic/wally-config.vh +++ b/wally-pipelined/config/rv32ic/wally-config.vh @@ -61,16 +61,24 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits +`define BOOTTIMSUPPORTED 1'b1 `define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder `define BOOTTIMRANGE 32'h00003FFF +//`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder +//`define BOOTTIMRANGE 32'h00000FFF +`define TIMSUPPORTED 1'b1 `define TIMBASE 32'h80000000 `define TIMRANGE 32'h07FFFFFF +`define CLINTSUPPORTED 1'b1 `define CLINTBASE 32'h02000000 `define CLINTRANGE 32'h0000FFFF +`define GPIOSUPPORTED 1'b1 `define GPIOBASE 32'h10012000 `define GPIORANGE 32'h000000FF +`define UARTSUPPORTED 1'b1 `define UARTBASE 32'h10000000 `define UARTRANGE 32'h00000007 +`define PLICSUPPORTED 1'b1 `define PLICBASE 32'h0C000000 `define PLICRANGE 32'h03FFFFFF diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh index 1c94adf0..d9928cdb 100644 --- a/wally-pipelined/config/rv64ic/wally-config.vh +++ b/wally-pipelined/config/rv64ic/wally-config.vh @@ -65,18 +65,24 @@ // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits +`define BOOTTIMSUPPORTED 1'b1 `define BOOTTIMBASE 32'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder `define BOOTTIMRANGE 32'h00003FFF //`define BOOTTIMBASE 32'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder //`define BOOTTIMRANGE 32'h00000FFF +`define TIMSUPPORTED 1'b1 `define TIMBASE 32'h80000000 `define TIMRANGE 32'h07FFFFFF +`define CLINTSUPPORTED 1'b1 `define CLINTBASE 32'h02000000 `define CLINTRANGE 32'h0000FFFF +`define GPIOSUPPORTED 1'b1 `define GPIOBASE 32'h10012000 `define GPIORANGE 32'h000000FF +`define UARTSUPPORTED 1'b1 `define UARTBASE 32'h10000000 `define UARTRANGE 32'h00000007 +`define PLICSUPPORTED 1'b1 `define PLICBASE 32'h0C000000 `define PLICRANGE 32'h03FFFFFF diff --git a/wally-pipelined/src/mmu/pmaadrdec.sv b/wally-pipelined/src/mmu/pmaadrdec.sv new file mode 100644 index 00000000..ea7688a2 --- /dev/null +++ b/wally-pipelined/src/mmu/pmaadrdec.sv @@ -0,0 +1,45 @@ +/////////////////////////////////////////// +// pmaadrdec.sv +// +// Written: David_Harris@hmc.edu 29 January 2021 +// Modified: +// +// Purpose: Address decoder +// +// A component of the Wally configurable RISC-V project. +// +// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University +// +// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation +// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, +// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software +// is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +/////////////////////////////////////////// + +`include "wally-config.vh" + +module pmaadrdec ( + input logic [31:0] HADDR, + input logic [31:0] Base, Range, + input logic Supported, + output logic HSEL +); + + logic [31:0] match; + + // determine if an address is in a range starting at the base + // for example, if Base = 0x04002000 and range = 0x00000FFF, + // then anything address between 0x04002000 and 0x04002FFF should match (HSEL=1) + + assign match = (HADDR ~^ Base) | Range; + assign HSEL = &match & Supported; + +endmodule + diff --git a/wally-pipelined/src/mmu/pmachecker.sv b/wally-pipelined/src/mmu/pmachecker.sv index 61c02426..f188bb27 100644 --- a/wally-pipelined/src/mmu/pmachecker.sv +++ b/wally-pipelined/src/mmu/pmachecker.sv @@ -54,15 +54,30 @@ module pmachecker ( logic HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC; logic ValidBootTim, ValidTim, ValidCLINT, ValidGPIO, ValidUART, ValidPLIC; - // Attributes of memory region accessed - logic Executable, Readable, Writable; + logic PMAAccessFault; + logic AccessRW, AccessRWX, AccessRX; - logic Fault; + // Determine what type of access is being made + assign AccessRW = ReadAccessM | WriteAccessM; + assign AccessRWX = ReadAccessM | WriteAccessM | ExecuteAccessF; + assign AccessRX = ReadAccessM | ExecuteAccessF; - attributes attributes(.Address(HADDR), .*); - // Unswizzle region bits - assign {BootTim, Tim, CLINT, GPIO, UART, PLIC} = Regions; + // Determine which region of physical memory (if any) is being accessed + pmaadrdec boottimdec(HADDR, `BOOTTIMBASE, `BOOTTIMRANGE, `BOOTTIMSUPPORTED, BootTim); + pmaadrdec timdec(HADDR, `TIMBASE, `TIMRANGE, `TIMSUPPORTED, Tim); + pmaadrdec clintdec(HADDR, `CLINTBASE, `CLINTRANGE, `CLINTSUPPORTED, CLINT); + pmaadrdec gpiodec(HADDR, `GPIOBASE, `GPIORANGE, `GPIOSUPPORTED, GPIO); + pmaadrdec uartdec(HADDR, `UARTBASE, `UARTRANGE, `UARTSUPPORTED, UART); + pmaadrdec plicdec(HADDR, `PLICBASE, `PLICRANGE, `PLICSUPPORTED, PLIC); + + // Swizzle region bits + assign Regions = {BootTim, Tim, CLINT, GPIO, UART, PLIC}; + + // Only RAM memory regions are cacheable + assign Cacheable = BootTim | Tim; + assign Idempotent = BootTim | Tim; + assign AtomicAllowed = BootTim | Tim; assign ValidBootTim = '1; assign ValidTim = '1; @@ -81,50 +96,11 @@ module pmachecker ( // Swizzle region bits assign HSELRegions = {HSELBootTim, HSELTim, HSELCLINT, HSELGPIO, HSELUART, HSELPLIC}; - assign Fault = ~|HSELRegions; + assign PMAAccessFault = ~|HSELRegions; - assign PMAInstrAccessFaultF = ExecuteAccessF && Fault; - assign PMALoadAccessFaultM = ReadAccessM && Fault; - assign PMAStoreAccessFaultM = WriteAccessM && Fault; - - assign PMASquashBusAccess = PMAInstrAccessFaultF || PMALoadAccessFaultM || PMAStoreAccessFaultM; - -endmodule - -module attributes ( -// input logic clk, reset, // *** unused in this module and all sub modules. - - input logic [31:0] Address, - - output logic [5:0] Regions, - - output logic Cacheable, Idempotent, AtomicAllowed, - output logic Executable, Readable, Writable -); - - // Signals are high if the memory access is within the given region - logic BootTim, Tim, CLINT, GPIO, UART, PLIC; - - // Determine which region of physical memory (if any) is being accessed - adrdec boottimdec(Address, `BOOTTIMBASE, `BOOTTIMRANGE, BootTim); - adrdec timdec(Address, `TIMBASE, `TIMRANGE, Tim); - adrdec clintdec(Address, `CLINTBASE, `CLINTRANGE, CLINT); - adrdec gpiodec(Address, `GPIOBASE, `GPIORANGE, GPIO); - adrdec uartdec(Address, `UARTBASE, `UARTRANGE, UART); - adrdec plicdec(Address, `PLICBASE, `PLICRANGE, PLIC); - - // Swizzle region bits - assign Regions = {BootTim, Tim, CLINT, GPIO, UART, PLIC}; - - // Only RAM memory regions are cacheable - assign Cacheable = BootTim | Tim; - - assign Idempotent = BootTim | Tim; - - assign AtomicAllowed = BootTim | Tim; - - assign Executable = BootTim | Tim; - assign Readable = BootTim | Tim | CLINT | GPIO | UART | PLIC; - assign Writable = BootTim | Tim | CLINT | GPIO | UART | PLIC; + assign PMAInstrAccessFaultF = ExecuteAccessF && PMAAccessFault; + assign PMALoadAccessFaultM = ReadAccessM && PMAAccessFault; + assign PMAStoreAccessFaultM = WriteAccessM && PMAAccessFault; + assign PMASquashBusAccess = PMAAccessFault && AccessRWX; endmodule