diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag
index 91fc1039..dd536770 100644
--- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/Makefrag
@@ -31,7 +31,8 @@ rv64i_sc_tests = \
     WALLY-MMU-SV39 \
     WALLY-MMU-SV48 \
     WALLY-PMA \
-    WALLY-PMP
+    WALLY-PMP 
+
 
 rv64i_tests = $(addsuffix .elf, $(rv64i_sc_tests))
 
diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.S
index 3867e29e..04de379c 100644
--- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.S
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.S
@@ -629,40 +629,6 @@ terminate_test:
     ecall #  writes mcause to the output.
     csrw mtvec, x4  # restore original trap handler to halt program
 
-/*
-	# ---------------------------------------------------------------------------------------------
-
-	RVTEST_IO_WRITE_STR(x31, "Test End\n")
-
-	# ---------------------------------------------------------------------------------------------
-
-	RV_COMPLIANCE_HALT
-
-RV_COMPLIANCE_CODE_END
-
-# Input data section.
-	.data
-
-.align 3 # align stack to 8 byte boundary
-bottom_of_stack:
-    .fill 1024, 4, -1 
-top_of_stack:
-
-
-# Output data section.
-RV_COMPLIANCE_DATA_BEGIN
-
-.align 3 # align output to 8 byte boundary
-test_1_res:
-    .fill 1024, 4, -1 
-
-RV_COMPLIANCE_DATA_END
-
-
-.align 3
-test_cases:
-*/
-
 RVTEST_CODE_END
 RVMODEL_HALT
 
@@ -678,37 +644,13 @@ bottom_of_stack:
 top_of_stack:
 
 
-
 RVMODEL_DATA_BEGIN
 
-// next lines through test cases copied over from old framework
 test_1_res:
     .fill 1024, 4, -1 
 
 RVMODEL_DATA_END
 
-
-/*
-signature_x8_0:
-    .fill 0*(XLEN/32),4,0xdeadbeef
-
-
-signature_x8_1:
-    .fill 19*(XLEN/32),4,0xdeadbeef
-
-
-signature_x1_0:
-    .fill 256*(XLEN/32),4,0xdeadbeef
-
-
-signature_x1_1:
-    .fill 256*(XLEN/32),4,0xdeadbeef
-
-
-signature_x1_2:
-    .fill 148*(XLEN/32),4,0xdeadbeef
-*/
-
 #ifdef rvtest_mtrap_routine
 
 mtrap_sigptr:
diff --git a/wally-pipelined/regression/regression-wally.py b/wally-pipelined/regression/regression-wally.py
index 2c6850b6..3140815e 100755
--- a/wally-pipelined/regression/regression-wally.py
+++ b/wally-pipelined/regression/regression-wally.py
@@ -51,7 +51,7 @@ tc = TestCase(
       grepstr="400100000 instructions")
 configs.append(tc)
 
-tests64gc = ["arch64i", "arch64priv", "arch64c",  "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64p", "imperas64mmu", "imperas64m", "imperas64a",  "imperas64c"] # "wally64i", #,  "testsBP64"] 
+tests64gc = ["arch64i", "arch64priv", "arch64c",  "arch64m", "arch64d", "imperas64i", "imperas64f", "imperas64d", "imperas64p", "imperas64m", "imperas64a",  "imperas64c", "wally64priv"] # "wally64i", #,  "testsBP64"] 
 for test in tests64gc:
   tc = TestCase(
         name=test,
@@ -59,7 +59,7 @@ for test in tests64gc:
         cmd="vsim > {} -c <<!\ndo wally-pipelined-batch.do rv64gc "+test+"\n!",
         grepstr="All tests ran without failures")
   configs.append(tc)
-tests32gc = ["arch32i", "arch32priv", "arch32c",  "arch32m", "arch32f", "imperas32i", "imperas32f", "imperas32p", "imperas32mmu", "imperas32m", "imperas32a",  "imperas32c"]  #"wally32i", 
+tests32gc = ["arch32i", "arch32priv", "arch32c",  "arch32m", "arch32f", "imperas32i", "imperas32f", "imperas32p", "imperas32m", "imperas32a",  "imperas32c", "wally32priv"]  #"wally32i", 
 for test in tests32gc:
   tc = TestCase(
         name=test,
diff --git a/wally-pipelined/regression/sim-wally-batch b/wally-pipelined/regression/sim-wally-batch
index accdc918..fdaec1d1 100755
--- a/wally-pipelined/regression/sim-wally-batch
+++ b/wally-pipelined/regression/sim-wally-batch
@@ -1,3 +1,3 @@
 vsim -c <<!
-do wally-pipelined-batch.do rv32ic arch32i
+do wally-pipelined-batch.do rv64gc wally64priv
 !
diff --git a/wally-pipelined/src/mmu/mmu.sv b/wally-pipelined/src/mmu/mmu.sv
index c9c13066..5e4a4b0e 100644
--- a/wally-pipelined/src/mmu/mmu.sv
+++ b/wally-pipelined/src/mmu/mmu.sv
@@ -117,18 +117,7 @@ module mmu #(parameter TLB_ENTRIES = 8, // number of TLB Entries
   ///////////////////////////////////////////
 
   pmachecker pmachecker(.*);
-
-  // if the number of entries is zero  or no csr no pmp checker
-  generate
-	if(`PMP_ENTRIES > 0) begin : pmpchecker
-	  pmpchecker pmpchecker(.*);
-	end else begin
-	  assign PMPInstrAccessFaultF = 1'b0;
-	  assign PMPLoadAccessFaultM = 1'b0;
-	  assign PMPStoreAccessFaultM = 1'b0;
-	end
-  endgenerate
-
+  pmpchecker pmpchecker(.*);
 
   // If TLB miss and translating we want to not have faults from the PMA and PMP checkers.
 //  assign SquashBusAccess = PMASquashBusAccess | PMPSquashBusAccess;
diff --git a/wally-pipelined/src/mmu/pmpchecker.sv b/wally-pipelined/src/mmu/pmpchecker.sv
index 90ee0994..0e18c698 100644
--- a/wally-pipelined/src/mmu/pmpchecker.sv
+++ b/wally-pipelined/src/mmu/pmpchecker.sv
@@ -73,6 +73,10 @@ module pmpchecker (
       assign PMPInstrAccessFaultF = EnforcePMP && ExecuteAccessF && ~|X;
       assign PMPStoreAccessFaultM = EnforcePMP && WriteAccessM   && ~|W;
       assign PMPLoadAccessFaultM  = EnforcePMP && ReadAccessM    && ~|R;
+    end else begin: pmpchecker  // no checker
+      assign PMPInstrAccessFaultF = 0;
+      assign PMPLoadAccessFaultM = 0;
+      assign PMPStoreAccessFaultM = 0;
     end
   endgenerate
   //assign PMPSquashBusAccess = PMPInstrAccessFaultF | PMPLoadAccessFaultM | PMPStoreAccessFaultM;
diff --git a/wally-pipelined/testbench/tests.vh b/wally-pipelined/testbench/tests.vh
index bcf67dc8..7339adae 100644
--- a/wally-pipelined/testbench/tests.vh
+++ b/wally-pipelined/testbench/tests.vh
@@ -26,7 +26,8 @@
 `define IMPERASTEST   "0"
 `define RISCVARCHTEST "1"
 `define WALLYTEST "2"
-`define MYIMPERASTEST   "3"
+`define MYIMPERASTEST   "3" 
+// *** remove MYIMPERASTEST cases when ported 
 
 string tvpaths[] = '{
     "../../addins/imperas-riscv-tests/work/",
@@ -1484,7 +1485,11 @@ string imperas32f[] = '{
  };
 
  string wally64priv[] = '{
-    `WALLYTEST
+    `WALLYTEST,
+    "rv64i_m/privilege/WALLY-MMU-SV39", "30A0",
+    "rv64i_m/privilege/WALLY-MMU-SV48", "30A0",
+    "rv64i_m/privilege/WALLY-PMA", "30A0",
+    "rv64i_m/privilege/WALLY-PMP", "30A0"
  };
 
  string wally64periph[] = '{
@@ -1497,7 +1502,10 @@ string wally32i[] = '{
  };
 
  string wally32priv[] = '{
-    `WALLYTEST
+    `WALLYTEST,
+    "rv32i_m/privilege/WALLY-MMU-SV32", "3080",
+    "rv32i_m/privilege/WALLY-PMA", "3080",
+    "rv32i_m/privilege/WALLY-PMP", "3080"
  };
 
  string wally32periph[] = '{