From d07a7fd0f85108b7a3153ed30c9d0bd3a26cd908 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Mon, 3 May 2021 19:51:51 -0400
Subject: [PATCH] Flush uart print statements on \n

---
 wally-pipelined/src/uncore/uartPC16550D.sv | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/wally-pipelined/src/uncore/uartPC16550D.sv b/wally-pipelined/src/uncore/uartPC16550D.sv
index 3509b5b0..d4029faf 100644
--- a/wally-pipelined/src/uncore/uartPC16550D.sv
+++ b/wally-pipelined/src/uncore/uartPC16550D.sv
@@ -377,7 +377,8 @@ module uartPC16550D(
           txhrfull <= #1 1;
         end
         $write("%c",Din); // for testbench
-        if (Din == 13) $fflush;
+        //if (Din == 13) $fflush;
+        $fflush;
       end
       if (txstate == UART_IDLE) begin // move data into tx shift register if available
         if (fifoenabled) begin