diff --git a/wally-pipelined/src/mmu/pagetablewalker.sv b/wally-pipelined/src/mmu/pagetablewalker.sv
index 0d771479..d0d2152f 100644
--- a/wally-pipelined/src/mmu/pagetablewalker.sv
+++ b/wally-pipelined/src/mmu/pagetablewalker.sv
@@ -546,7 +546,7 @@ module pagetablewalker
       // Assign outputs to ahblite
       // *** Currently truncate address to 32 bits. This must be changed if
       // we support larger physical address spaces
-      assign MMUPAdr = {{(`XLEN-32){1'b0}}, TranslationPAdr[31:0]};
+      assign MMUPAdr = {{(`XLEN-`PA_BITS){1'b0}}, TranslationPAdr[`PA_BITS-1:0]};
     end
   endgenerate