diff --git a/wally-pipelined/config/buildroot/wally-config.vh b/wally-pipelined/config/buildroot/wally-config.vh
index ace7366d..a535abff 100644
--- a/wally-pipelined/config/buildroot/wally-config.vh
+++ b/wally-pipelined/config/buildroot/wally-config.vh
@@ -62,9 +62,7 @@
 // Peripheral memory space extends from BASE to BASE+RANGE
 // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
 `define BOOTTIM_SUPPORTED 1'b1
-//`define BOOTTIM_BASE   56'h00000000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
-//`define BOOTTIM_RANGE  56'h00003FFF
-`define BOOTTIM_BASE   56'h00001000 // spec had been 0x1000 to 0x2FFF, but dh truncated to 0x1000 to 0x1FFF because upper half seems to be all zeros and this is easier for decoder
+`define BOOTTIM_BASE   56'h00001000 
 `define BOOTTIM_RANGE  56'h00000FFF
 `define TIM_SUPPORTED 1'b1
 `define TIM_BASE       56'h80000000
diff --git a/wally-pipelined/config/coremark-64i/wally-config.vh b/wally-pipelined/config/coremark-64i/wally-config.vh
index 17d48344..ae3100c6 100644
--- a/wally-pipelined/config/coremark-64i/wally-config.vh
+++ b/wally-pipelined/config/coremark-64i/wally-config.vh
@@ -72,6 +72,7 @@
 `define PLIC_SUPPORTED 1'b1
 `define PLIC_BASE   56'h0C000000
 `define PLIC_RANGE  56'h03FFFFFF
+
 // Test modes
 
 // Tie GPIO outputs back to inputs
diff --git a/wally-pipelined/src/mmu/pmpchecker.sv b/wally-pipelined/src/mmu/pmpchecker.sv
index 96018231..e073a2f1 100644
--- a/wally-pipelined/src/mmu/pmpchecker.sv
+++ b/wally-pipelined/src/mmu/pmpchecker.sv
@@ -51,43 +51,36 @@ module pmpchecker (
   output logic             PMPStoreAccessFaultM
 );
 
-  // verilator lint_off UNOPTFLAT
 
   // Bit i is high when the address falls in PMP region i
   logic                    EnforcePMP;
-  logic [7:0]              PMPCFG [`PMP_ENTRIES-1:0];
+  logic [7:0]              PMPCfg[`PMP_ENTRIES-1:0];
   logic [`PMP_ENTRIES-1:0] Match;      // PMP Entry matches
   logic [`PMP_ENTRIES-1:0] Active;     // PMP register i is non-null
   logic [`PMP_ENTRIES-1:0] L, X, W, R; // PMP matches and has flag set
-  logic [`PMP_ENTRIES:0]   NoLowerMatch; // None of the lower PMP entries match
-  logic [`PMP_ENTRIES:0]   PAgePMPAdr;  // for TOR PMP matching, PhysicalAddress > PMPAdr[i]
-  genvar i,j;
-
-  assign PAgePMPAdr[0] = 1'b1;
-  assign NoLowerMatch[0] = 1'b1;
-  
-  generate
-    // verilator lint_off WIDTH
-    for (j=0; j<`PMP_ENTRIES; j = j+8)
-      assign {PMPCFG[j+7], PMPCFG[j+6], PMPCFG[j+5], PMPCFG[j+4],
-              PMPCFG[j+3], PMPCFG[j+2], PMPCFG[j+1], PMPCFG[j]} = PMPCFG_ARRAY_REGW[j/8];
-    // verilator lint_on WIDTH
-    for (i=0; i<`PMP_ENTRIES; i++)  // *** can this be done with array notation?
-      pmpadrdec pmpadrdec(.PhysicalAddress, 
-                          .PMPCfg(PMPCFG[i]),
-                          .PMPAdr(PMPADDR_ARRAY_REGW[i]),
-                          .PAgePMPAdrIn(PAgePMPAdr[i]),
-                          .PAgePMPAdrOut(PAgePMPAdr[i+1]),
-                          .NoLowerMatchIn(NoLowerMatch[i]),
-                          .NoLowerMatchOut(NoLowerMatch[i+1]),
-                          .Match(Match[i]),
-                          .Active(Active[i]),
-                          .L(L[i]), .X(X[i]), .W(W[i]), .R(R[i])
-                          );
-
+  // verilator lint_off UNOPTFLAT
+  logic [`PMP_ENTRIES-1:0]   NoLowerMatch; // None of the lower PMP entries match
     // verilator lint_on UNOPTFLAT
+  logic [`PMP_ENTRIES-1:0]   PAgePMPAdr;  // for TOR PMP matching, PhysicalAddress > PMPAdr[i]
+  genvar i,j;
+ 
+  generate // extract 8-bit chunks from PMPCFG array
+    for (j=0; j<`PMP_ENTRIES; j = j+8)
+      assign {PMPCfg[j+7], PMPCfg[j+6], PMPCfg[j+5], PMPCfg[j+4],
+              PMPCfg[j+3], PMPCfg[j+2], PMPCfg[j+1], PMPCfg[j]} = PMPCFG_ARRAY_REGW[j/8];
   endgenerate
 
+  pmpadrdec pmpadrdec[`PMP_ENTRIES-1:0](
+    .PhysicalAddress, 
+    .PMPCfg,
+    .PMPAdr(PMPADDR_ARRAY_REGW),
+    .PAgePMPAdrIn({PAgePMPAdr[`PMP_ENTRIES-2:0], 1'b1}),
+    .PAgePMPAdrOut(PAgePMPAdr),
+    .NoLowerMatchIn({NoLowerMatch[`PMP_ENTRIES-2:0], 1'b1}),
+    .NoLowerMatchOut(NoLowerMatch),
+    .Match, .Active, .L, .X, .W, .R);
+
+
   // Only enforce PMP checking for S and U modes when at least one PMP is active or in Machine mode when L bit is set in selected region
   assign EnforcePMP = (PrivilegeModeW == `M_MODE) ? |L : |Active;