diff --git a/wally-pipelined/src/fpu/fma.sv b/wally-pipelined/src/fpu/fma.sv
index 0b2ff32b..faab2012 100644
--- a/wally-pipelined/src/fpu/fma.sv
+++ b/wally-pipelined/src/fpu/fma.sv
@@ -253,7 +253,7 @@ module fma2(
     // Negate Z  when doing one of the following opperations:
     //      -prod +  Z
     //       prod -  Z
-    assign ZSgnEffM = ZSgnM^FOpCtrlE[0]; // Swap sign of Z for subtract
+    assign ZSgnEffM = ZSgnM^FOpCtrlM[0]; // Swap sign of Z for subtract
     assign InvZ = ZSgnEffM ^ PSgn;
 
     // Choose an inverted or non-inverted addend - the one is added later
diff --git a/wally-pipelined/src/fpu/unpacking.sv b/wally-pipelined/src/fpu/unpacking.sv
index 170c46ac..914e9979 100644
--- a/wally-pipelined/src/fpu/unpacking.sv
+++ b/wally-pipelined/src/fpu/unpacking.sv
@@ -19,13 +19,11 @@ module unpacking (
     logic           XExpNonzero, YExpNonzero, ZExpNonzero;
     logic           XFracZero, YFracZero, ZFracZero; // input fraction zero
     logic           XExpZero, YExpZero, ZExpZero; // input exponent zero
-//    logic [63:0]    Addend; // value to add (Z or zero)
     logic           YExpMaxE, ZExpMaxE;  // input exponent all 1s
 
-//    assign Addend = FOpCtrlE[2] ? 64'b0 : Z; // Z is only used in the FMA, and is set to Zero if a multiply opperation
     assign XSgnE = FmtE ? X[63] : X[31];
     assign YSgnE = FmtE ? Y[63] : Y[31];
-    assign ZSgnE = FmtE ? Z[63]^FOpCtrlE[0] : Z[31]^FOpCtrlE[0]; // *** Maybe this should be done in the FMA for modularity?
+    assign ZSgnE = FmtE ? Z[63] : Z[31];
 
     assign XExpE = FmtE ? X[62:52] : {X[30], {3{~X[30]&~XExpZero|XExpMaxE}}, X[29:23]}; 
     assign YExpE = FmtE ? Y[62:52] : {Y[30], {3{~Y[30]&~YExpZero|YExpMaxE}}, Y[29:23]};