diff --git a/pipelined/regression/sim-wally-batch b/pipelined/regression/sim-wally-batch index afaf935c..e9a387d0 100755 --- a/pipelined/regression/sim-wally-batch +++ b/pipelined/regression/sim-wally-batch @@ -1 +1 @@ -vsim -c -do "do wally-pipelined-batch.do rv32ic arch32i" +vsim -c -do "do wally-pipelined-batch.do rv32gc wally32priv" diff --git a/pipelined/src/lsu/bigendianswap.sv b/pipelined/src/lsu/endianswap.sv similarity index 100% rename from pipelined/src/lsu/bigendianswap.sv rename to pipelined/src/lsu/endianswap.sv diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh index 61e76ff1..b6c7c790 100644 --- a/pipelined/testbench/tests.vh +++ b/pipelined/testbench/tests.vh @@ -1818,7 +1818,8 @@ string imperas32f[] = '{ "rv64i_m/privilege/src/WALLY-trap-sret-01.S", "rv64i_m/privilege/src/WALLY-trap-u-01.S", "rv64i_m/privilege/src/WALLY-wfi-01.S", - "rv64i_m/privilege/src/WALLY-endianness-01.S" + "rv64i_m/privilege/src/WALLY-endianness-01.S", + "rv64i_m/privilege/src/WALLY-status-xlen-01.S" }; string wally64periph[] = '{ @@ -1896,7 +1897,8 @@ string imperas32f[] = '{ "rv32i_m/privilege/src/WALLY-trap-s-01.S", "rv32i_m/privilege/src/WALLY-trap-sret-01.S", "rv32i_m/privilege/src/WALLY-trap-u-01.S", - "rv32i_m/privilege/src/WALLY-wfi-01.S" + "rv32i_m/privilege/src/WALLY-wfi-01.S", + "rv32i_m/privilege/src/WALLY-endianness-01.S" }; string wally32periph[] = '{ diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-endianness-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-endianness-01.S index e51a6b65..c13dde25 100644 --- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-endianness-01.S +++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-endianness-01.S @@ -58,7 +58,7 @@ addi t1, t1, 4 addi a6, a6, 4 li x28, 0x20 -csrs mstatush, x28 // turn on big endianness for M mode +csrs 0x310, x28 // turn on big endianness for M mode // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush // M mode Big endianness tests // In big endian modes, all values are sign extended to the right, rather than left @@ -83,7 +83,7 @@ addi t1, t1, 4 addi a6, a6, 4 li x28, 0x20 -csrc mstatush, x28 // Turn off big endianness for M mode before going into the trap handler +csrc 0x310, x28 // Turn off big endianness for M mode before going into the trap handler // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush GOTO_S_MODE @@ -91,7 +91,7 @@ GOTO_S_MODE li x28, 0xAABBCCDD li x29, 0x8000F000 -sd x28, 0(x29) // value stored in memory as 0xAABBCCDD +sw x28, 0(x29) // value stored in memory as 0xAABBCCDD lw x30, 0(x29) // test load word, should read out 0xAABBCCDD sw x30, 0(t1) // test store word, should save 0xAABBCCDD @@ -111,7 +111,7 @@ addi a6, a6, 4 GOTO_M_MODE // Go back to M mode to be able to toggle SBE bit of mstatus li x28, 0x10 -csrs mstatush, x28 // turn on big endianness for S mode +csrs 0x310, x28 // turn on big endianness for S mode // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush GOTO_S_MODE @@ -119,7 +119,7 @@ GOTO_S_MODE li x28, 0xAABBCCDD li x29, 0x8000F000 -sd x28, 0(x29) // value stored in memory as 0xDDCCBBAA +sw x28, 0(x29) // value stored in memory as 0xDDCCBBAA lw x30, 0(x29) // test load word, should read out 0xAABBCCDD sw x30, 0(t1) // test store word, should save 0xDDCCBBAA @@ -142,7 +142,7 @@ GOTO_U_MODE li x28, 0xAABBCCDD li x29, 0x8000F000 -sd x28, 0(x29) // value stored in memory as 0xAABBCCDD +sw x28, 0(x29) // value stored in memory as 0xAABBCCDD lw x30, 0(x29) // test load word, should read out 0xAABBCCDD sw x30, 0(t1) // test store word, should save 0xAABBCCDD @@ -170,7 +170,7 @@ GOTO_U_MODE li x28, 0xAABBCCDD li x29, 0x8000F000 -sd x28, 0(x29) // value stored in memory as 0xDDCCBBAA +sw x28, 0(x29) // value stored in memory as 0xDDCCBBAA lw x30, 0(x29) // test load word, should read out 0xAABBCCDD sw x30, 0(t1) // test store word, should save 0xDDCCBBAA @@ -187,6 +187,9 @@ sb x30, 0(t1) // test store byte, should save 0xAA addi t1, t1, 4 addi a6, a6, 4 +//store_location: +//.fill + END_TESTS TEST_STACK_AND_DATA \ No newline at end of file