From b5e86b2e20762452808c86c799c98c5d2484a5c6 Mon Sep 17 00:00:00 2001 From: Kevin Kim Date: Tue, 30 Nov 2021 18:16:37 -0800 Subject: [PATCH] Added git submodules -riscv-arch-test -rscv-isa-sim submodules are added in addins/ directory --- .gitmodules | 6 ++++++ addins/riscv-isa-sim | 1 + 2 files changed, 7 insertions(+) create mode 160000 addins/riscv-isa-sim diff --git a/.gitmodules b/.gitmodules index 65e1e71c..76cae724 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,9 @@ [submodule "sky130/sky130_osu_sc_t12"] path = sky130/sky130_osu_sc_t12 url = https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12/ +[submodule "addins/riscv-arch-test"] + path = addins/riscv-arch-test + url = https://github.com/riscv-non-isa/riscv-arch-test.git +[submodule "addins/riscv-isa-sim"] + path = addins/riscv-isa-sim + url = https://github.com/riscv-software-src/riscv-isa-sim diff --git a/addins/riscv-isa-sim b/addins/riscv-isa-sim new file mode 160000 index 00000000..6507ccc3 --- /dev/null +++ b/addins/riscv-isa-sim @@ -0,0 +1 @@ +Subproject commit 6507ccc30f29948a81661048e8a0ac3ae8e9a436