diff --git a/tests/testsBP/fpga-blink-led/blink-led.s b/tests/testsBP/fpga-blink-led/blink-led.s
index f3a5d66b..5d4d48ce 100644
--- a/tests/testsBP/fpga-blink-led/blink-led.s
+++ b/tests/testsBP/fpga-blink-led/blink-led.s
@@ -47,7 +47,7 @@ _start:
 
 	# write to gpio
 	li	x2, 0xFF
-	la	x3, 0x10012000
+	la	x3, 0x10060000
 
 	# +8 is output enable
 	# +C is output value
diff --git a/tests/testsBP/fpga-test-dram/blink-led.s b/tests/testsBP/fpga-test-dram/blink-led.s
index 7c44d8e9..9e524b2e 100644
--- a/tests/testsBP/fpga-test-dram/blink-led.s
+++ b/tests/testsBP/fpga-test-dram/blink-led.s
@@ -47,7 +47,7 @@ _start:
 
 	# write to gpio
 	li	x2, 0xFF
-	la	x3, 0x10012000
+	la	x3, 0x10060000
 
 	# +8 is output enable
 	# +C is output value
diff --git a/tests/testsBP/fpga-test-sdc/old.asm b/tests/testsBP/fpga-test-sdc/old.asm
index c65b9557..6137fae7 100644
--- a/tests/testsBP/fpga-test-sdc/old.asm
+++ b/tests/testsBP/fpga-test-sdc/old.asm
@@ -71,7 +71,7 @@ copy_sdc2:
 
 	# write to gpio
 	li	x2, 0xFF
-	la	x3, 0x10012000
+	la	x3, 0x10060000
 
 	# +8 is output enable
 	# +C is output value
diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PMA.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PMA.S
index 778014fe..6188b2ac 100644
--- a/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PMA.S
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-PMA.S
@@ -27,7 +27,7 @@
 #define RAM_RANGE      0x7FFFFFFF
 #define CLINT_BASE     0x02000000
 #define CLINT_RANGE    0x0000FFFF
-#define GPIO_BASE      0x10012000
+#define GPIO_BASE      0x10060000
 #define GPIO_RANGE     0x000000FF
 #define UART_BASE      0x10000000
 #define UART_RANGE     0x00000007
diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PMA.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PMA.S
index 7a6a7075..51b9d338 100644
--- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PMA.S
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PMA.S
@@ -27,7 +27,7 @@
 #define RAM_RANGE      0x7FFFFFFF
 #define CLINT_BASE     0x02000000
 #define CLINT_RANGE    0x0000FFFF
-#define GPIO_BASE      0x10012000
+#define GPIO_BASE      0x10060000
 #define GPIO_RANGE     0x000000FF
 #define UART_BASE      0x10000000
 #define UART_RANGE     0x00000007