From a1c9ffdf2bc7695489ddae793f94618d3f1152f4 Mon Sep 17 00:00:00 2001 From: Shreya Sanghai Date: Mon, 11 Oct 2021 11:20:12 -0700 Subject: [PATCH] added redundant multiplier --- wally-pipelined/src/muldiv/mul.sv | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/wally-pipelined/src/muldiv/mul.sv b/wally-pipelined/src/muldiv/mul.sv index bc766e9c..cff07e67 100644 --- a/wally-pipelined/src/muldiv/mul.sv +++ b/wally-pipelined/src/muldiv/mul.sv @@ -66,8 +66,7 @@ module mul ( // *** assumes unsigned multiplication assign Aprime = {1'b0, SrcAE[`XLEN-2:0]}; assign Bprime = {1'b0, SrcBE[`XLEN-2:0]}; - DW02_multp #(`XLEN, `XLEN, 2*`XLEN) bigmul(.a(Aprime), .b(Bprime), .tc(1'b0), .out0(PP0E), .out1(PP1E)); - // DW02_multp #((`XLEN-1), (`XLEN-1), 2*(`XLEN-1)) multp_dw( .a(SrcAE[`XLEN-2:0]), .b(SrcBE[`XLEN-2:0]), .tc(1'b0), .out0(Pprime0), .out1(Pprime1) ); + redundantmul #(`XLEN) bigmul(.a(Aprime), .b(Bprime), .out0(PP0E), .out1(PP1E)); assign PA = {(`XLEN-1){SrcAE[`XLEN-1]}} & SrcBE[`XLEN-2:0]; assign PB = {(`XLEN-1){SrcBE[`XLEN-1]}} & SrcAE[`XLEN-2:0]; assign PP = SrcAE[`XLEN-1] & SrcBE[`XLEN-1];