From ad3e632119a72605295b5743c7e2b3471d730841 Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Thu, 25 Aug 2022 15:52:25 -0500
Subject: [PATCH] Almost fixed issues with irom and dtim address selection.

---
 pipelined/src/ifu/ifu.sv | 2 +-
 pipelined/src/lsu/lsu.sv | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/pipelined/src/ifu/ifu.sv b/pipelined/src/ifu/ifu.sv
index b5ce73c4..1e82cad3 100644
--- a/pipelined/src/ifu/ifu.sv
+++ b/pipelined/src/ifu/ifu.sv
@@ -185,7 +185,7 @@ module ifu (
   assign InstrRawF = AllInstrRawF[31:0];
 
   if (`IROM) begin : irom 
-    irom irom(.clk, .reset, .Adr(PCNextFSpill), .ReadData(FinalInstrRawF));
+    irom irom(.clk, .reset, .Adr(CPUBusy | reset ? PCPF : PCNextFSpill), .ReadData(FinalInstrRawF));
  
     assign {BusStall, IFUBusRead} = '0;   
     assign {ICacheStallF, ICacheMiss, ICacheAccess} = '0;
diff --git a/pipelined/src/lsu/lsu.sv b/pipelined/src/lsu/lsu.sv
index 416e62a1..107afcf4 100644
--- a/pipelined/src/lsu/lsu.sv
+++ b/pipelined/src/lsu/lsu.sv
@@ -201,7 +201,9 @@ module lsu (
   // *** becomes DTIM_RAM_BASE
 
   if (`DMEM) begin : dtim
-    dtim dtim(.clk, .reset, .LSURWM, .IEUAdrE, .TrapM, .WriteDataM(LSUWriteDataM), 
+    dtim dtim(.clk, .reset, .LSURWM,
+              .IEUAdrE(CPUBusy | LSURWM[0] | reset ? IEUAdrM : IEUAdrE),
+              .TrapM, .WriteDataM(LSUWriteDataM), 
               .ReadDataWordM(ReadDataWordM[`XLEN-1:0]), .ByteMaskM(ByteMaskM[`XLEN/8-1:0]), .Cacheable(CacheableM));
 
     // since we have a local memory the bus connections are all disabled.