From ac21bed64d6cda7cb4944919d60bde1b361fc4c6 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Sun, 19 Feb 2023 15:31:00 -0800
Subject: [PATCH] Moved conditional instantiation outside pmpchecker

---
 src/mmu/mmu.sv        | 18 +++++++++++------
 src/mmu/pmpchecker.sv | 46 +++++++++++++++++++------------------------
 2 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/src/mmu/mmu.sv b/src/mmu/mmu.sv
index 8a440c39..5b524816 100644
--- a/src/mmu/mmu.sv
+++ b/src/mmu/mmu.sv
@@ -107,15 +107,21 @@ module mmu #(parameter TLB_ENTRIES = 8, IMMU = 0) (
     .Cacheable, .Idempotent, .SelTIM,
     .PMAInstrAccessFaultF, .PMALoadAccessFaultM, .PMAStoreAmoAccessFaultM);
  
-  pmpchecker pmpchecker(.PhysicalAddress, .PrivilegeModeW,
-    .PMPCFG_ARRAY_REGW, .PMPADDR_ARRAY_REGW,
-    .ExecuteAccessF, .WriteAccessM, .ReadAccessM,
-    .PMPInstrAccessFaultF, .PMPLoadAccessFaultM, .PMPStoreAmoAccessFaultM);
+  if (`PMP_ENTRIES > 0) 
+    pmpchecker pmpchecker(.PhysicalAddress, .PrivilegeModeW,
+      .PMPCFG_ARRAY_REGW, .PMPADDR_ARRAY_REGW,
+      .ExecuteAccessF, .WriteAccessM, .ReadAccessM,
+      .PMPInstrAccessFaultF, .PMPLoadAccessFaultM, .PMPStoreAmoAccessFaultM);
+  else begin
+    assign PMPInstrAccessFaultF     = 0;
+    assign PMPStoreAmoAccessFaultM  = 0;
+    assign PMPLoadAccessFaultM      = 0;
+  end
 
   // Access faults
   // If TLB miss and translating we want to not have faults from the PMA and PMP checkers.
-  assign InstrAccessFaultF    = (PMAInstrAccessFaultF | PMPInstrAccessFaultF) & ~(Translate & ~TLBHit);
-  assign LoadAccessFaultM     = (PMALoadAccessFaultM | PMPLoadAccessFaultM) & ~(Translate & ~TLBHit);
+  assign InstrAccessFaultF    = (PMAInstrAccessFaultF    | PMPInstrAccessFaultF)    & ~(Translate & ~TLBHit);
+  assign LoadAccessFaultM     = (PMALoadAccessFaultM     | PMPLoadAccessFaultM)     & ~(Translate & ~TLBHit);
   assign StoreAmoAccessFaultM = (PMAStoreAmoAccessFaultM | PMPStoreAmoAccessFaultM) & ~(Translate & ~TLBHit);
 
   // Misaligned faults
diff --git a/src/mmu/pmpchecker.sv b/src/mmu/pmpchecker.sv
index a5796136..de8ce7b3 100644
--- a/src/mmu/pmpchecker.sv
+++ b/src/mmu/pmpchecker.sv
@@ -49,34 +49,28 @@ module pmpchecker (
   output logic                     PMPStoreAmoAccessFaultM
 );
 
-  if (`PMP_ENTRIES > 0) begin
-    // Bit i is high when the address falls in PMP region i
-    logic                    EnforcePMP;
-    logic [`PMP_ENTRIES-1:0] Match; // physical address matches one of the pmp ranges
-    logic [`PMP_ENTRIES-1:0] FirstMatch; // onehot encoding for the first pmpaddr to match the current address.
-    logic [`PMP_ENTRIES-1:0] Active;     // PMP register i is non-null
-    logic [`PMP_ENTRIES-1:0] L, X, W, R; // PMP matches and has flag set
-    logic [`PMP_ENTRIES-1:0]   PAgePMPAdr;  // for TOR PMP matching, PhysicalAddress > PMPAdr[i]
+  // Bit i is high when the address falls in PMP region i
+  logic                    EnforcePMP;
+  logic [`PMP_ENTRIES-1:0] Match; // physical address matches one of the pmp ranges
+  logic [`PMP_ENTRIES-1:0] FirstMatch; // onehot encoding for the first pmpaddr to match the current address.
+  logic [`PMP_ENTRIES-1:0] Active;     // PMP register i is non-null
+  logic [`PMP_ENTRIES-1:0] L, X, W, R; // PMP matches and has flag set
+  logic [`PMP_ENTRIES-1:0]   PAgePMPAdr;  // for TOR PMP matching, PhysicalAddress > PMPAdr[i]
 
-    pmpadrdec pmpadrdecs[`PMP_ENTRIES-1:0](
-      .PhysicalAddress, 
-      .PMPCfg(PMPCFG_ARRAY_REGW),
-      .PMPAdr(PMPADDR_ARRAY_REGW),
-      .PAgePMPAdrIn({PAgePMPAdr[`PMP_ENTRIES-2:0], 1'b1}),
-      .PAgePMPAdrOut(PAgePMPAdr),
-      .Match, .Active, .L, .X, .W, .R);
+  pmpadrdec pmpadrdecs[`PMP_ENTRIES-1:0](
+    .PhysicalAddress, 
+    .PMPCfg(PMPCFG_ARRAY_REGW),
+    .PMPAdr(PMPADDR_ARRAY_REGW),
+    .PAgePMPAdrIn({PAgePMPAdr[`PMP_ENTRIES-2:0], 1'b1}),
+    .PAgePMPAdrOut(PAgePMPAdr),
+    .Match, .Active, .L, .X, .W, .R);
 
-    priorityonehot #(`PMP_ENTRIES) pmppriority(.a(Match), .y(FirstMatch)); // combine the match signal from all the adress decoders to find the first one that matches.
+  priorityonehot #(`PMP_ENTRIES) pmppriority(.a(Match), .y(FirstMatch)); // combine the match signal from all the adress decoders to find the first one that matches.
 
-    // Only enforce PMP checking for S and U modes when at least one PMP is active or in Machine mode when L bit is set in selected region
-    assign EnforcePMP = (PrivilegeModeW == `M_MODE) ? |(L & FirstMatch) : |Active; 
+  // Only enforce PMP checking for S and U modes when at least one PMP is active or in Machine mode when L bit is set in selected region
+  assign EnforcePMP = (PrivilegeModeW == `M_MODE) ? |(L & FirstMatch) : |Active; 
 
-    assign PMPInstrAccessFaultF     = EnforcePMP & ExecuteAccessF & ~|(X & FirstMatch) ;
-    assign PMPStoreAmoAccessFaultM  = EnforcePMP & WriteAccessM   & ~|(W & FirstMatch) ;
-    assign PMPLoadAccessFaultM      = EnforcePMP & ReadAccessM    & ~|(R & FirstMatch) ;
-  end else begin
-    assign PMPInstrAccessFaultF     = 0;
-    assign PMPStoreAmoAccessFaultM  = 0;
-    assign PMPLoadAccessFaultM      = 0;
-  end
+  assign PMPInstrAccessFaultF     = EnforcePMP & ExecuteAccessF & ~|(X & FirstMatch) ;
+  assign PMPStoreAmoAccessFaultM  = EnforcePMP & WriteAccessM   & ~|(W & FirstMatch) ;
+  assign PMPLoadAccessFaultM      = EnforcePMP & ReadAccessM    & ~|(R & FirstMatch) ;
  endmodule