diff --git a/pipelined/src/lsu/bigendianswap.sv b/pipelined/src/lsu/bigendianswap.sv
index 29c717ed..e621afcf 100644
--- a/pipelined/src/lsu/bigendianswap.sv
+++ b/pipelined/src/lsu/bigendianswap.sv
@@ -1,5 +1,5 @@
 ///////////////////////////////////////////
-// bigendianswap.sv
+// endianswap.sv
 //
 // Written: David_Harris@hmc.edu 7 May 2022
 // Modified: 
@@ -30,7 +30,7 @@
 
 `include "wally-config.vh"
 
-module bigendianswap #(parameter LEN=`XLEN) (
+module endianswap #(parameter LEN=`XLEN) (
   input  logic             BigEndianM,
   input  logic [LEN-1:0] a,
   output logic [LEN-1:0] y); 
diff --git a/pipelined/src/lsu/lsu.sv b/pipelined/src/lsu/lsu.sv
index cd983c2e..70e0573a 100644
--- a/pipelined/src/lsu/lsu.sv
+++ b/pipelined/src/lsu/lsu.sv
@@ -347,8 +347,8 @@ module lsu (
   //  swap the bytes when read from big-endian memory
   /////////////////////////////////////////////////////////////////////////////////////////////
   if (`BIGENDIAN_SUPPORTED) begin:endian
-    bigendianswap #(`LLEN) storeswap(.BigEndianM, .a(LittleEndianWriteDataM), .y(LSUWriteDataM));
-    bigendianswap #(`LLEN) loadswap(.BigEndianM, .a(ReadDataWordMuxM), .y(LittleEndianReadDataWordM));
+    endianswap #(`LLEN) storeswap(.BigEndianM, .a(LittleEndianWriteDataM), .y(LSUWriteDataM));
+    endianswap #(`LLEN) loadswap(.BigEndianM, .a(ReadDataWordMuxM), .y(LittleEndianReadDataWordM));
   end else begin
     assign LSUWriteDataM = LittleEndianWriteDataM;
     assign LittleEndianReadDataWordM = ReadDataWordMuxM;