diff --git a/pipelined/regression/sim-buildroot b/pipelined/regression/sim-buildroot index 8814ca6f..adafb8ec 100755 --- a/pipelined/regression/sim-buildroot +++ b/pipelined/regression/sim-buildroot @@ -30,4 +30,4 @@ echo "INSTR_LIMIT = ${INSTR_LIMIT}" echo "INSTR_WAVEON = ${INSTR_WAVEON}" echo "CHECKPOINT = ${CHECKPOINT}" -vsim -do "do ./wally-buildroot.do $INSTR_LIMIT $INSTR_WAVEON $CHECKPOINT" +vsim -do "do ./wally-pipelined.do buildroot buildroot $INSTR_LIMIT $INSTR_WAVEON $CHECKPOINT" diff --git a/pipelined/regression/wally-buildroot-batch.do b/pipelined/regression/wally-buildroot-batch.do deleted file mode 100644 index b079ed39..00000000 --- a/pipelined/regression/wally-buildroot-batch.do +++ /dev/null @@ -1,39 +0,0 @@ -# wally-pipelined.do -# -# Modification by Oklahoma State University & Harvey Mudd College -# James Stine, 2008; David Harris 2021 -# Go Cowboys!!!!!! -# -# Takes 1:10 to run RV64IC tests using gui - -# Use this wally-pipelined.do file to run this example. -# Either bring up ModelSim and type the following at the "ModelSim>" prompt: -# do wally-pipelined.do -# or, to run from a shell, type the following at the shell prompt: -# vsim -do wally-pipelined.do -c -# (omit the "-c" to see the GUI while running from the shell) - -onbreak {resume} - -# create library -if [file exists work-buildroot] { - vdel -all -lib work-buildroot -} -vlib work-buildroot - -# compile source files -# suppress spurious warnngs about -# "Extra checking for conflicts with always_comb done at vopt time" -# because vsim will run vopt -vlog -lint +incdir+../config/buildroot +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 - - -# start and run simulation -vopt work.testbench -G INSTR_LIMIT=$1 -G INSTR_WAVEON=$2 -G CHECKPOINT=$3 -o workopt - -vsim workopt -suppress 8852,12070 - -run -all -run -all -exec ./slack-notifier/slack-notifier.py -quit diff --git a/pipelined/regression/wally-buildroot.do b/pipelined/regression/wally-buildroot.do deleted file mode 100644 index 2ef74547..00000000 --- a/pipelined/regression/wally-buildroot.do +++ /dev/null @@ -1,44 +0,0 @@ -# wally-pipelined.do -# -# Modification by Oklahoma State University & Harvey Mudd College -# James Stine, 2008; David Harris 2021 -# Go Cowboys!!!!!! -# -# Takes 1:10 to run RV64IC tests using gui - -# Use this wally-pipelined.do file to run this example. -# Either bring up ModelSim and type the following at the "ModelSim>" prompt: -# do wally-pipelined.do -# or, to run from a shell, type the following at the shell prompt: -# vsim -do wally-pipelined.do -c -# (omit the "-c" to see the GUI while running from the shell) - -onbreak {resume} - -# create library -if [file exists work-buildroot] { - vdel -all -lib work-buildroot -} -vlib work-buildroot - -# compile source files -# suppress spurious warnngs about -# "Extra checking for conflicts with always_comb done at vopt time" -# because vsim will run vopt -vlog +incdir+../config/buildroot +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 - - -# start and run simulation -# remove +acc flag for faster sim during regressions if there is no need to access internal signals -vopt +acc work.testbench -G INSTR_LIMIT=$1 -G INSTR_WAVEON=$2 -G CHECKPOINT=$3 -o workopt - -vsim workopt -suppress 8852,12070 - -#-- Run the Simulation -run -all -do linux-wave.do -add log -recursive /* -run -all - -exec ./slack-notifier/slack-notifier.py -#quit diff --git a/pipelined/regression/wally-pipelined.do b/pipelined/regression/wally-pipelined.do index 565643d8..db84feb4 100644 --- a/pipelined/regression/wally-pipelined.do +++ b/pipelined/regression/wally-pipelined.do @@ -29,28 +29,41 @@ vlib work # "Extra checking for conflicts with always_comb done at vopt time" # because vsim will run vopt -# default to config/rv64ic, but allow this to be overridden at the command line. For example: -# do wally-pipelined.do ../config/rv32ic -#switch $argc { -# 0 {vlog +incdir+../config/rv64ic +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv -suppress 2583} -# 1 {vlog +incdir+$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv -suppress 2583} -#} # start and run simulation # remove +acc flag for faster sim during regressions if there is no need to access internal signals -vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063 -vopt +acc work.testbench -G TEST=$2 -G DEBUG=1 -o workopt -vsim workopt +nowarn3829 +if {$2 eq "buildroot"} { + vlog +incdir+../config/buildroot +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -view wave --- display input and output signals as hexidecimal values -#do ./wave-dos/peripheral-waves.do -add log -recursive /* -do wave.do --- Run the Simulation -#run 3600 -run -all -#quit -#noview ../testbench/testbench-imperas.sv -noview ../testbench/testbench.sv -view wave + # start and run simulation + # remove +acc flag for faster sim during regressions if there is no need to access internal signals + vopt +acc work.testbench -G INSTR_LIMIT=$3 -G INSTR_WAVEON=$4 -G CHECKPOINT=$5 -o workopt + + vsim workopt -suppress 8852,12070 + + #-- Run the Simulation + run -all + do linux-wave.do + add log -recursive /* + run -all + + exec ./slack-notifier/slack-notifier.py + } else { + vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063 + vopt +acc work.testbench -G TEST=$2 -G DEBUG=1 -o workopt + + vsim workopt +nowarn3829 + + view wave + #-- display input and output signals as hexidecimal values + #do ./wave-dos/peripheral-waves.do + add log -recursive /* + do wave.do + + #-- Run the Simulation + #run 3600 + run -all + noview ../testbench/testbench.sv + view wave +} +