From a514554eeb4cd6cf4eaef7a92c62ef351bea7b36 Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 23 Jun 2021 03:03:52 -0400 Subject: [PATCH] Reduced complexity of pmpadrdec --- .../regression/wave-dos/peripheral-waves.do | 22 +++++++++---------- wally-pipelined/src/mmu/pmpadrdec.sv | 2 +- wally-pipelined/src/mmu/pmpchecker.sv | 4 ++++ 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/wally-pipelined/regression/wave-dos/peripheral-waves.do b/wally-pipelined/regression/wave-dos/peripheral-waves.do index 5c9f3870..1304b40c 100644 --- a/wally-pipelined/regression/wave-dos/peripheral-waves.do +++ b/wally-pipelined/regression/wave-dos/peripheral-waves.do @@ -65,17 +65,17 @@ add wave -hex /testbench/dut/hart/priv/csr/genblk1/csrm/MEPC_REGW add wave -divider # peripherals -add wave -hex /testbench/dut/uncore/plic/* -add wave -hex /testbench/dut/uncore/plic/intPriority -add wave -hex /testbench/dut/uncore/plic/pendingArray -add wave -divider -add wave -hex /testbench/dut/uncore/uart/u/* -add wave -divider -add wave -hex /testbench/dut/uncore/gpio/* -add wave -divider -add wave -hex /testbench/dut/hart/ebu/* -add wave -divider -add wave -divider +#add wave -hex /testbench/dut/uncore/plic/* +#add wave -hex /testbench/dut/uncore/plic/intPriority +#add wave -hex /testbench/dut/uncore/plic/pendingArray +#add wave -divider +#add wave -hex /testbench/dut/uncore/uart/u/* +#add wave -divider +#add wave -hex /testbench/dut/uncore/gpio/* +#add wave -divider +#add wave -hex /testbench/dut/hart/ebu/* +#add wave -divider +#add wave -divider # everything else add wave -hex -r /testbench/* diff --git a/wally-pipelined/src/mmu/pmpadrdec.sv b/wally-pipelined/src/mmu/pmpadrdec.sv index 11c239b2..87f5d8f1 100644 --- a/wally-pipelined/src/mmu/pmpadrdec.sv +++ b/wally-pipelined/src/mmu/pmpadrdec.sv @@ -67,7 +67,7 @@ module pmpadrdec ( // create a mask of which bits to ignore generate assign Mask[1:0] = 2'b11; - assign Mask[2] = ~CurrentPMPAdr[0] & (AdrMode == NAPOT); // mask has 0s in upper bis for NA4 region + assign Mask[2] = (AdrMode == NAPOT); // mask has 0s in upper bis for NA4 region for (i=3; i < `PA_BITS; i=i+1) assign Mask[i] = Mask[i-1] & CurrentPMPAdr[i-3]; // NAPOT mask: 1's indicate bits to ignore endgenerate diff --git a/wally-pipelined/src/mmu/pmpchecker.sv b/wally-pipelined/src/mmu/pmpchecker.sv index 8b33ccf3..f88d56fa 100644 --- a/wally-pipelined/src/mmu/pmpchecker.sv +++ b/wally-pipelined/src/mmu/pmpchecker.sv @@ -76,6 +76,8 @@ module pmpchecker ( logic L_Bit, X_Bit, W_Bit, R_Bit; logic InvalidExecute, InvalidWrite, InvalidRead; + // *** extend to optionally 64 configurations + assign {PMPCFG[15], PMPCFG[14], PMPCFG[13], PMPCFG[12], PMPCFG[11], PMPCFG[10], PMPCFG[9], PMPCFG[8]} = PMPCFG23_REGW; @@ -107,6 +109,7 @@ module pmpchecker ( // Only enforce PMP checking for S and U modes when at least one PMP is active assign EnforcePMP = |ActiveRegion; + // *** extend to up to 64, fold bit extraction to avoid need for binary encoding of region always_comb casez (Regions) 16'b???????????????1: MatchedRegion = 0; @@ -137,6 +140,7 @@ module pmpchecker ( assign InvalidWrite = WriteAccessM && ~W_Bit; assign InvalidRead = ReadAccessM && ~R_Bit; + // *** don't cause faults when there are no PMPs assign PMPInstrAccessFaultF = (PrivilegeModeW == `M_MODE) ? Match && L_Bit && InvalidExecute : EnforcePMP && InvalidExecute;