diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh
index d59a58c9..70bd4a0a 100644
--- a/wally-pipelined/config/rv32ic/wally-config.vh
+++ b/wally-pipelined/config/rv32ic/wally-config.vh
@@ -57,7 +57,20 @@
 // Address space
 `define RESET_VECTOR 32'h80000000
 
-// Bus Interface
+// Peripheral Addresses
+// Peripheral memory space extends from BASE to BASE+RANGE
+// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
+
+`define TIMBASE    64'h0000000080000000
+`define TIMRANGE   64'h000000000007FFFF
+`define CLINTBASE  64'h0000000002000000
+`define CLINTRANGE 64'h000000000000FFFF
+`define GPIOBASE   64'h0000000010012000
+`define GPIORANGE  64'h00000000000000FF
+`define UARTBASE   64'h0000000010000000
+`define UARTRANGE  64'h0000000000000007
+
+// Bus Interface width
 `define AHBW 32
 
 // Test modes
diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh
index ae42d13b..87170635 100644
--- a/wally-pipelined/config/rv64ic/wally-config.vh
+++ b/wally-pipelined/config/rv64ic/wally-config.vh
@@ -58,10 +58,21 @@
 // Address space
 `define RESET_VECTOR 64'h0000000080000000
 
-// Bus Interface
+// Bus Interface width
 `define AHBW 64
 
 // Peripheral Addresses
+// Peripheral memory space extends from BASE to BASE+RANGE
+// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
+
+`define TIMBASE    64'h0000000080000000
+`define TIMRANGE   64'h000000000007FFFF
+`define CLINTBASE  64'h0000000002000000
+`define CLINTRANGE 64'h000000000000FFFF
+`define GPIOBASE   64'h0000000010012000
+`define GPIORANGE  64'h00000000000000FF
+`define UARTBASE   64'h0000000010000000
+`define UARTRANGE  64'h0000000000000007
 
 // Test modes
 
diff --git a/wally-pipelined/src/adrdec.sv b/wally-pipelined/src/adrdec.sv
new file mode 100644
index 00000000..86ab1460
--- /dev/null
+++ b/wally-pipelined/src/adrdec.sv
@@ -0,0 +1,44 @@
+///////////////////////////////////////////
+// adrdec.sv
+//
+// Written: David_Harris@hmc.edu 29 January 2021
+// Modified: 
+//
+// Purpose: Address decoder
+// 
+// A component of the Wally configurable RISC-V project.
+// 
+// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
+// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, 
+// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software 
+// is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 
+// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 
+// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT 
+// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+///////////////////////////////////////////
+
+`include "wally-config.vh"
+
+module adrdec (
+  input  logic [`XLEN-1:0] AdrM,
+  input  logic [`XLEN-1:0] Base, Range,
+  output logic             En
+);
+
+  logic [`XLEN-1:0] match;
+
+  // determine if an address is in a range starting at the base
+  // for example, if Base = 0x04002000 and range = 0x00000FFF,
+  // then anything address between 0x04002000 and 0x04002FFF should match (En=1)
+
+  assign match = (AdrM ~^ Base) | Range;
+  assign En = &match;
+
+endmodule
+
diff --git a/wally-pipelined/src/uncore.sv b/wally-pipelined/src/uncore.sv
index a4b9be36..54371685 100644
--- a/wally-pipelined/src/uncore.sv
+++ b/wally-pipelined/src/uncore.sv
@@ -52,7 +52,12 @@ module uncore (
   logic            UARTIntr;// *** will need to tie INTR to an interrupt handler
 
   // Address decoding
-  // *** generalize, use configurable
+  adrdec timdec(AdrM, `TIMBASE, `TIMRANGE, TimEnM);
+  adrdec clintdec(AdrM, `CLINTBASE, `CLINTRANGE, CLINTEnM);
+  adrdec gpiodec(AdrM, `GPIOBASE, `GPIORANGE, GPIOEnM);
+  adrdec uartdec(AdrM, `UARTBASE, `UARTRANGE, UARTEnM);
+  
+  /*// *** generalize, use configurable
   generate
     if (`XLEN == 64)
       assign TimEnM = ~(|AdrM[`XLEN-1:32]) & AdrM[31] & ~(|AdrM[30:19]); // 0x000...80000000 - 0x000...8007FFFF
@@ -62,6 +67,7 @@ module uncore (
   assign CLINTEnM = ~(|AdrM[`XLEN-1:26]) & AdrM[25] & ~(|AdrM[24:16]); // 0x02000000-0x0200FFFF
   assign GPIOEnM = (AdrM[31:8] == 24'h10012); // 0x10012000-0x100120FF
   assign UARTEnM = ~(|AdrM[`XLEN-1:29]) & AdrM[28] & ~(|AdrM[27:3]); // 0x10000000-0x10000007
+  */
 
   // Enable read or write based on decoded address.
   assign MemRWdtimM  = MemRWM & {2{TimEnM}};