From 955ddcfbe1739d236440ff296b601a351330bcd7 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Fri, 3 Dec 2021 17:55:36 -0600 Subject: [PATCH] Fixed bug in the top level of fpga verilog. --- fpga/src/fpgaTop.v | 1 - 1 file changed, 1 deletion(-) diff --git a/fpga/src/fpgaTop.v b/fpga/src/fpgaTop.v index eb78e89d..d9751c9c 100644 --- a/fpga/src/fpgaTop.v +++ b/fpga/src/fpgaTop.v @@ -44,7 +44,6 @@ module fpgaTop output calib, output cpu_reset, - output ddr4_sdram_c1_062, output ahblite_resetn, output [16 : 0] c0_ddr4_adr,