From 913a381442834d4067894b56de0f5fdf03d1f814 Mon Sep 17 00:00:00 2001 From: Katherine Parry Date: Sat, 25 Jun 2022 00:04:53 +0000 Subject: [PATCH] commented out error - also some divider bugs fixed --- pipelined/src/fpu/divshiftcalc.sv | 23 +++++++++++++++++++---- pipelined/src/fpu/flags.sv | 6 +++--- 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/pipelined/src/fpu/divshiftcalc.sv b/pipelined/src/fpu/divshiftcalc.sv index d1a364b3..3a576664 100644 --- a/pipelined/src/fpu/divshiftcalc.sv +++ b/pipelined/src/fpu/divshiftcalc.sv @@ -10,12 +10,27 @@ module divshiftcalc( logic ResDenorm; logic [`NE+1:0] DenormShift; logic [`NE+1:0] NormShift; - assign ResDenorm = DivCalcExpM[`NE+1]; - assign DenormShift = (`NE+2)'(`NF-1)+DivCalcExpM; - assign NormShift = {(`NE+1)'(0), ~Quot[`DIVLEN+2]} + (`NE+2)'(`NF); + + // is the result denromalized + // if the exponent is 1 then the result needs to be normalized then the result is denormalizes + assign ResDenorm = DivCalcExpM[`NE+1]|(~|DivCalcExpM[`NE+1:1]&~(DivCalcExpM[0]&Quot[`DIVLEN+2])); + // if the result is denormalized + // 00000000x.xxxxxx... Exp = DivCalcExp + // .00000000xxxxxxx... >> NF+1 Exp = DivCalcExp+NF+1 + // .000xxxxxxxxxxxx... << DivCalcExp+NF+1 Exp = 0 + // .0000xxxxxxxxxxx... >> 1 Exp = 1 + // Left shift amount = DivCalcExp+NF+1-1 + assign DenormShift = (`NE+2)'(`NF)+DivCalcExpM; + // if the result is denormalized + // 00000000x.xxxxxx... Exp = DivCalcExp + // .00000000xxxxxxx... >> NF+1 Exp = DivCalcExp+NF+1 + // 00000000x.xxxxxx... << NF+1 Exp = DivCalcExp + // 00000000xx.xxxxx... << 1? Exp = DivCalcExp-1 + // Left shift amount = NF+1 plus 1 if normalization required + assign NormShift = (`NE+2)'(`NF+1) + {(`NE+1)'(0), ~Quot[`DIVLEN+2]}; assign DivShiftAmt = ResDenorm ? DenormShift[$clog2(`NORMSHIFTSZ)-1:0] : NormShift[$clog2(`NORMSHIFTSZ)-1:0]; - assign DivShiftIn = {(`NF)'(0), Quot[`DIVLEN+1:0], {`NORMSHIFTSZ-`DIVLEN-2-`NF{1'b0}}}; + // assign DivShiftIn = {(`NF)'(0), Quot[`DIVLEN+2:0], {`NORMSHIFTSZ-`DIVLEN-3-`NF{1'b0}}}; // the quotent is in the range [.5,2) // if the quotent < 1 and not denormal then subtract 1 to account for the normalization shift assign CorrDivExp = (ResDenorm&~DenormShift[`NE+1]) ? (`NE+2)'(0) : DivCalcExpM - {(`NE+1)'(0), ~Quot[`DIVLEN+2]}; diff --git a/pipelined/src/fpu/flags.sv b/pipelined/src/fpu/flags.sv index 122df8b2..c91e30a5 100644 --- a/pipelined/src/fpu/flags.sv +++ b/pipelined/src/fpu/flags.sv @@ -88,7 +88,7 @@ module flags( // | and the exponent isn't negitive // | | if the input isnt infinity or NaN // | | | - assign Overflow = ResExpGteMax & ~FullResExp[`NE+1]&~(InfIn|NaNIn); + assign Overflow = ResExpGteMax & ~FullResExp[`NE+1]&~(InfIn|NaNIn|DivByZero); // detecting tininess after rounding // the exponent is negitive @@ -98,11 +98,11 @@ module flags( // | | | | and if the result is not exact // | | | | | and if the input isnt infinity or NaN // | | | | | | - assign Underflow = ((FullResExp[`NE+1] | (FullResExp == 0) | ((FullResExp == 1) & (RoundExp == 0) & ~(UfPlus1&UfLSBRes)))&(Round|Sticky))&~(InfIn|NaNIn); + assign Underflow = ((FullResExp[`NE+1] | (FullResExp == 0) | ((FullResExp == 1) & (RoundExp == 0) & ~(UfPlus1&UfLSBRes)))&(Round|Sticky))&~(InfIn|NaNIn|DivByZero); // Set Inexact flag if the res is diffrent from what would be outputed given infinite precision // - Don't set the underflow flag if an underflowed res isn't outputed - assign FpInexact = (Sticky|Overflow|Round|Underflow)&~(InfIn|NaNIn); + assign FpInexact = (Sticky|Overflow|Round|Underflow)&~(InfIn|NaNIn|DivByZero); // if the res is too small to be represented and not 0 // | and if the res is not invalid (outside the integer bounds)