diff --git a/src/ieu/bmu/bmuctrl.sv b/src/ieu/bmu/bmuctrl.sv
index abaf3655..ab275047 100644
--- a/src/ieu/bmu/bmuctrl.sv
+++ b/src/ieu/bmu/bmuctrl.sv
@@ -132,6 +132,15 @@ module bmuctrl(
       17'b0110011_0100000_111:   BMUControlsD = `BMUCTRLW'b111_0100_111;  // andn
       17'b0110011_0100000_110:   BMUControlsD = `BMUCTRLW'b110_0100_111;  // orn
       17'b0110011_0100000_100:   BMUControlsD = `BMUCTRLW'b100_0100_111;  // xnor
+      17'b0010011_0110101_101: if (`XLEN == 64) 
+                                 BMUControlsD = `BMUCTRLW'b000_0100_011;  // rev8 (rv64)
+                               else 
+                                 BMUControlsD = `BMUCTRLW'b000_0000_000;  // illegal instruction
+      17'b0010011_0110100_101: if (`XLEN == 32) 
+                                 BMUControlsD = `BMUCTRLW'b000_0100_011;  // rev8 (rv32)
+                               else 
+                                 BMUControlsD = `BMUCTRLW'b000_0000_000;  // illegal instruction
+      17'b0010011_0010100_101:   BMUControlsD = `BMUCTRLW'b000_0100_011;  // orc.b
                                  
       default:                   BMUControlsD = {Funct3D, {7'b0}};        // not B instruction or shift
     endcase
diff --git a/src/ieu/bmu/byte.sv b/src/ieu/bmu/byte.sv
index 6a076b7d..efd43d84 100644
--- a/src/ieu/bmu/byte.sv
+++ b/src/ieu/bmu/byte.sv
@@ -30,10 +30,10 @@
 `include "wally-config.vh"
 
 module byteUnit #(parameter WIDTH=32) (
-  input  logic [WIDTH-1:0] A,             // Operands
-  output logic [WIDTH-1:0] OrcBResult,    // OrcB result
-  output logic [WIDTH-1:0] Rev8Result);   // Rev8 result
+  input  logic [WIDTH-1:0] A, B,          // Operands
+  output logic [WIDTH-1:0] ByteResult);   // rev8, orcb result
 
+  logic [WIDTH-1:0] OrcBResult, Rev8Result;
   genvar i;
 
   for (i=0;i<WIDTH;i+=8) begin:loop
@@ -41,4 +41,6 @@ module byteUnit #(parameter WIDTH=32) (
     assign Rev8Result[WIDTH-i-1:WIDTH-i-8] = A[i+7:i];
   end
 
+  assign ByteResult = (B[0]) ? OrcBResult : Rev8Result;
+
 endmodule
\ No newline at end of file
diff --git a/src/ieu/bmu/zbb.sv b/src/ieu/bmu/zbb.sv
index bacbef81..2342fe0c 100644
--- a/src/ieu/bmu/zbb.sv
+++ b/src/ieu/bmu/zbb.sv
@@ -43,14 +43,13 @@ module zbb #(parameter WIDTH=32) (
   logic [WIDTH-1:0] CntResult;           
 
   // byte results
-  logic [WIDTH-1:0] OrcBResult;
-  logic [WIDTH-1:0] Rev8Result;
+  logic [WIDTH-1:0] ByteResult;
 
   // sign/zero extend results
   logic [WIDTH-1:0] ExtResult;           // sign/zero extend result
 
   cnt #(WIDTH) cnt(.A(A), .B(B), .W64(W64), .CntResult(CntResult));
-  byteUnit #(WIDTH) bu(.A(A), .OrcBResult(OrcBResult), .Rev8Result(Rev8Result));
+  byteUnit #(WIDTH) bu(.A(A), .B(B), .ByteResult(ByteResult));
   ext #(WIDTH) ext(.A(A), .B(B), .ExtResult(ExtResult));
 
   //can replace with structural mux by looking at bit 4 in rs2 field
@@ -59,6 +58,7 @@ module zbb #(parameter WIDTH=32) (
       3'b111: ZBBResult = ALUResult;  // rotates, andn, xnor, orn
       3'b000: ZBBResult = CntResult;  // count
       3'b100: ZBBResult = ExtResult;  // sign/zero extend
+      3'b011: ZBBResult = ByteResult; // byte instructions
       /*15'b0010100_101_00111: ZBBResult = OrcBResult;
       15'b0110100_101_11000: ZBBResult = Rev8Result;
       15'b0110101_101_11000: ZBBResult = Rev8Result;