From 869e812aa856922fd54d163846d7b460724656a6 Mon Sep 17 00:00:00 2001
From: Kevin Kim <kevindkim723@gmail.com>
Date: Sun, 5 Mar 2023 14:26:24 -0800
Subject: [PATCH] revA signals to  cnt, zbb

---
 src/ieu/bmu/cnt.sv | 3 ++-
 src/ieu/bmu/zbb.sv | 6 +++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/ieu/bmu/cnt.sv b/src/ieu/bmu/cnt.sv
index 32be6b2e..b5096a81 100644
--- a/src/ieu/bmu/cnt.sv
+++ b/src/ieu/bmu/cnt.sv
@@ -31,7 +31,8 @@
 `include "wally-config.vh"
 
 module cnt #(parameter WIDTH = 32) (
-  input  logic [WIDTH-1:0] A, B,       // Operands
+  input  logic [WIDTH-1:0] A, RevA,    // Operands
+  input  logic [4:0] B,                // Last 5 bits of immediate
   input  logic W64,                    // Indicates word operation
   output logic [WIDTH-1:0] CntResult   // count result
 );
diff --git a/src/ieu/bmu/zbb.sv b/src/ieu/bmu/zbb.sv
index 13529d6a..1c2ae6bc 100644
--- a/src/ieu/bmu/zbb.sv
+++ b/src/ieu/bmu/zbb.sv
@@ -31,14 +31,13 @@
 `include "wally-config.vh"
 
 module zbb #(parameter WIDTH=32) (
-  input  logic [WIDTH-1:0] A, B,         // Operands
+  input  logic [WIDTH-1:0] A, RevA, B,   // Operands
   input  logic [WIDTH-1:0] ALUResult,    // ALU Result
   input  logic             W64,          // Indicates word operation
   input  logic             lt,           // lt flag
   input  logic [2:0]       ZBBSelect,    // Indicates word operation
   output logic [WIDTH-1:0] ZBBResult);   // ZBB result
 
-
   
   // count result
   logic [WIDTH-1:0] CntResult;           
@@ -53,7 +52,8 @@ module zbb #(parameter WIDTH=32) (
   // sign/zero extend results
   logic [WIDTH-1:0] ExtResult;           // sign/zero extend result
 
-  cnt #(WIDTH) cnt(.A(A), .B(B), .W64(W64), .CntResult(CntResult));
+
+  cnt #(WIDTH) cnt(.A(A), .RevA(RevA), .B(B[4:0]), .W64(W64), .CntResult(CntResult));
   byteUnit #(WIDTH) bu(.A(A), .ByteSelect(B[0]), .ByteResult(ByteResult));
   ext #(WIDTH) ext(.A(A), .B(B), .ExtResult(ExtResult));