From 8692bafd046d21f64401687baf14cb19e4e3279c Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Wed, 16 Nov 2022 15:57:19 -0600 Subject: [PATCH] Updated fpga wave configuration. --- fpga/generator/wave_config.wcfg | 289 ++++++++++++++++++++++---------- 1 file changed, 200 insertions(+), 89 deletions(-) diff --git a/fpga/generator/wave_config.wcfg b/fpga/generator/wave_config.wcfg index 144f881e..0d36926c 100644 --- a/fpga/generator/wave_config.wcfg +++ b/fpga/generator/wave_config.wcfg @@ -3,29 +3,22 @@ - + - - - + + + - + - - - - - - - FullPathName @@ -85,7 +78,6 @@ CPU to LSU label - FullPathName wallypipelinedsoc/core/IEUAdrM[63:0] @@ -119,6 +111,38 @@ STYLE_DIGITAL + + FullPathName + wallypipelinedsoc/core/IEUAdrM[63:0] + IEUAdrM[63:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/MemRWM[1:0] + MemRWM[1:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/lsu/ReadDataM[63:0] + ReadDataM[63:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/lsu/WriteDataM[63:0] + WriteDataM[63:0] + HEXRADIX + true + STYLE_DIGITAL + PLIC label @@ -126,7 +150,6 @@ interrupts label - FullPathName wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[63:0] @@ -151,6 +174,29 @@ STYLE_DIGITAL + + FullPathName + wallypipelinedsoc/core/priv.priv/csr/csrm/MEDELEG_REGW[63:0] + MEDELEG_REGW[63:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/priv.priv/csr/csrm/MIDELEG_REGW[11:0] + MIDELEG_REGW[11:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/priv.priv/InterruptM + InterruptM + true + STYLE_DIGITAL + LSU to Bus label @@ -212,6 +258,7 @@ dcache label + FullPathName wallypipelinedsoc/core/lsu/bus.dcache.dcache/cachefsm/CurrState[3:0] @@ -225,6 +272,7 @@ EBU label + FullPathName wallypipelinedsoc/core/ebu.ebu/HTRANS[1:0] @@ -608,52 +656,88 @@ hazards label + FullPathName wallypipelinedsoc/core/hzu/BPPredWrongE BPPredWrongE + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/BreakpointFaultM BreakpointFaultM + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/CSRRdStallD CSRRdStallD + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/CSRWriteFencePendingDEM CSRWriteFencePendingDEM + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/DivBusyE DivBusyE + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/EcallFaultM EcallFaultM + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/FDivBusyE FDivBusyE + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/IFUStallF IFUStallF + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/LoadStallD LoadStallD + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/LSUStallM LSUStallM + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/MDUStallD MDUStallD + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/StoreStallD StoreStallD + true + STYLE_DIGITAL @@ -661,36 +745,60 @@ label + FullPathName wallypipelinedsoc/core/hzu/FlushD FlushD + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/FlushE FlushE + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/FlushM FlushM + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/FlushW FlushW + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/StallD StallD + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/StallE StallE + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/StallF StallF + true + STYLE_DIGITAL + FullPathName wallypipelinedsoc/core/hzu/StallM StallM + true + STYLE_DIGITAL @@ -709,67 +817,77 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsoc/core/ifu/bus.icache.icache/cachefsm/CurrState[3:0] - CurrState[3:0] - HEXRADIX - icache fsm - true - STYLE_DIGITAL + + IFU + label + + + label + wallypipelinedsoc/core/ifu/bus.icache.icache/cachefsm/CurrState[3:0] + CurrState[3:0] + HEXRADIX + icache fsm + true + STYLE_DIGITAL + + + label + wallypipelinedsoc/core/ifu/bus.icache.ahbcacheinterface/AHBBuscachefsm/CurrState[2:0] + CurrState[2:0] + HEXRADIX + ifu bus fsm + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/ifu/PCNextF[63:0] + PCNextF[63:0] + HEXRADIX + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/ifu/PCPF[55:0] + PCPF[55:0] + HEXRADIX + true + STYLE_DIGITAL + - - FullPathName - wallypipelinedsoc/core/ifu/bus.icache.ahbcacheinterface/AHBBuscachefsm/CurrState[2:0] - CurrState[2:0] - HEXRADIX - ifu bus fsm - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/ifu/PCNextF[63:0] - PCNextF[63:0] - HEXRADIX - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/ifu/PCPF[55:0] - PCPF[55:0] - HEXRADIX - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/lsu/DTLBMissM - DTLBMissM - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/lsu/DTLBWriteM - DTLBWriteM - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/lsu/ITLBMissF - ITLBMissF - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/lsu/ITLBWriteF - ITLBWriteF - true - STYLE_DIGITAL + + TLB + label + + + FullPathName + wallypipelinedsoc/core/lsu/DTLBMissM + DTLBMissM + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/lsu/DTLBWriteM + DTLBWriteM + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/lsu/ITLBMissF + ITLBMissF + true + STYLE_DIGITAL + + + FullPathName + wallypipelinedsoc/core/lsu/ITLBWriteF + ITLBWriteF + true + STYLE_DIGITAL + FullPathName @@ -787,21 +905,6 @@ true STYLE_DIGITAL - - FullPathName - wallypipelinedsoc/core/lsu/VIRTMEM_SUPPORTED.lsuvirtmem/interlockfsm/InterlockCurrState - InterlockCurrState - true - STYLE_DIGITAL - - - FullPathName - wallypipelinedsoc/core/lsu/VIRTMEM_SUPPORTED.lsuvirtmem/hptw/WalkerState[3:0] - WalkerState[3:0] - HEXRADIX - true - STYLE_DIGITAL - FullPathName wallypipelinedsoc/core/ieu/dp/regf/rf[2]__0[63:0] @@ -826,4 +929,12 @@ true STYLE_DIGITAL + + FullPathName + wallypipelinedsoc/core/lsu/VIRTMEM_SUPPORTED.hptw/WalkerState[3:0] + WalkerState[3:0] + HEXRADIX + true + STYLE_DIGITAL +