From 81f396f885d4f9ec62f7d4b6e2bc27f43e6df5a7 Mon Sep 17 00:00:00 2001
From: cturek <cturek@hmc.edu>
Date: Wed, 13 Jul 2022 18:30:18 +0000
Subject: [PATCH] Testbench accepts standard test vector files

---
 pipelined/srt/testbench.sv | 18 ++++--------------
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/pipelined/srt/testbench.sv b/pipelined/srt/testbench.sv
index 1f6f1561..537fbb3e 100644
--- a/pipelined/srt/testbench.sv
+++ b/pipelined/srt/testbench.sv
@@ -55,21 +55,11 @@ module testbench;
   parameter MEM_SIZE = 40000;
   parameter MEM_WIDTH = 64+64+64+64;
  
-  // INT TEST SIZES
-  // `define memrem  63:0 
-  // `define memr  127:64
-  // `define memb  191:128
-  // `define mema  255:192
-
-  // FLOAT TEST SIZES
-  // `define memr  63:0 
-  // `define memb  127:64
-  // `define mema  191:128
-
-  // SQRT TEST SIZES 
-  `define memr  63:0 
-  `define mema  127:64
+  // Test sizes
+  `define memrem  63:0 
+  `define memr  127:64
   `define memb  191:128
+  `define mema  255:192
 
   // Test logicisters
   logic [MEM_WIDTH-1:0] Tests [0:MEM_SIZE];  // Space for input file