From 7ff715f44f3bf40df4edfe35a006481a4d10a2c7 Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Wed, 9 Feb 2022 19:29:15 -0600
Subject: [PATCH] More cache cleanup.

---
 pipelined/src/cache/cache.sv | 87 +++++++++++++++++-------------------
 1 file changed, 41 insertions(+), 46 deletions(-)

diff --git a/pipelined/src/cache/cache.sv b/pipelined/src/cache/cache.sv
index cd1f86cb..863919b5 100644
--- a/pipelined/src/cache/cache.sv
+++ b/pipelined/src/cache/cache.sv
@@ -60,52 +60,47 @@ module cache #(parameter LINELEN,  NUMLINES,  NUMWAYS, DCACHE = 1) (
   output logic [LINELEN-1:0]  ReadDataLine);
 
   // Cache parameters
-  localparam  						LINEBYTELEN = LINELEN/8;
-  localparam  						OFFSETLEN = $clog2(LINEBYTELEN);
-  localparam  						SETLEN = $clog2(NUMLINES);
-  localparam                        SETTOP = SETLEN+OFFSETLEN;
-  localparam  						TAGLEN = `PA_BITS - SETTOP;
-  localparam  						WORDSPERLINE = LINELEN/`XLEN;
-  localparam  						LOGWPL = $clog2(WORDSPERLINE);
-  localparam  						LOGXLENBYTES = $clog2(`XLEN/8);
-  localparam  						FlushAdrThreshold   = NUMLINES - 1;
+  localparam                  LINEBYTELEN = LINELEN/8;
+  localparam                  OFFSETLEN = $clog2(LINEBYTELEN);
+  localparam                  SETLEN = $clog2(NUMLINES);
+  localparam                  SETTOP = SETLEN+OFFSETLEN;
+  localparam                  TAGLEN = `PA_BITS - SETTOP;
+  localparam                  WORDSPERLINE = LINELEN/`XLEN;
+  localparam                  FlushAdrThreshold   = NUMLINES - 1;
 
-  logic [1:0] 								SelAdr;
-  logic [SETLEN-1:0] 						RAdr;
-  logic [LINELEN-1:0] 						SRAMWriteData;
-  logic 									SetValid, ClearValid;
-  logic 									SetDirty, ClearDirty;
-  logic [LINELEN-1:0] 						ReadDataLineWay [NUMWAYS-1:0];
-  logic [NUMWAYS-1:0] 						WayHit;
-  logic 									CacheHit;
-  logic 									FSMWordWriteEn;
-  logic 									FSMLineWriteEn;
-  logic [NUMWAYS-1:0] 						SRAMLineWayWriteEnable;
-  logic [NUMWAYS-1:0] 						VictimWay;
-  logic [NUMWAYS-1:0] 						VictimDirtyWay;
-  logic 									VictimDirty;
-  logic [2**LOGWPL-1:0] 					MemPAdrDecoded;
-  logic [TAGLEN-1:0] 						VictimTagWay [NUMWAYS-1:0];
-  logic [TAGLEN-1:0] 						VictimTag;
-  logic [SETLEN-1:0] 						FlushAdr;
-  logic [SETLEN-1:0] 						FlushAdrP1;
-  logic 									FlushAdrCntEn;
-  logic 									FlushAdrCntRst;
-  logic 									FlushAdrFlag;
-  logic 									FlushWayFlag;
-  logic [NUMWAYS-1:0] 						FlushWay;
-  logic [NUMWAYS-1:0] 						NextFlushWay;
-  logic 									FlushWayCntEn;
-  logic 									FlushWayCntRst;  
-  logic 									SelEvict;
-  logic 									LRUWriteEn;
-  logic 									SelFlush;
-  logic                                     ResetOrFlushAdr, ResetOrFlushWay;
-  logic [NUMWAYS-1:0]                       WayHitSaved, WayHitRaw;
-  logic [LINELEN-1:0]                       ReadDataLineRaw, ReadDataLineSaved;
-  logic [NUMWAYS-1:0]                       SelectedWay;
-  logic [NUMWAYS-1:0]                       SetValidWay, ClearValidWay, SetDirtyWay, ClearDirtyWay;
-  logic [NUMWAYS-1:0]                       WriteWordWayEn, WriteLineWayEn;
+  logic [1:0]                 SelAdr;
+  logic [SETLEN-1:0]          RAdr;
+  logic [LINELEN-1:0]         SRAMWriteData;
+  logic                       SetValid, ClearValid;
+  logic                       SetDirty, ClearDirty;
+  logic [LINELEN-1:0]         ReadDataLineWay [NUMWAYS-1:0];
+  logic [NUMWAYS-1:0]         WayHit;
+  logic                       CacheHit;
+  logic                       FSMWordWriteEn;
+  logic                       FSMLineWriteEn;
+  logic [NUMWAYS-1:0]         VictimWay;
+  logic [NUMWAYS-1:0]         VictimDirtyWay;
+  logic                       VictimDirty;
+  logic [TAGLEN-1:0]          VictimTagWay [NUMWAYS-1:0];
+  logic [TAGLEN-1:0]          VictimTag;
+  logic [SETLEN-1:0]          FlushAdr;
+  logic [SETLEN-1:0]          FlushAdrP1;
+  logic                       FlushAdrCntEn;
+  logic                       FlushAdrCntRst;
+  logic                       FlushAdrFlag;
+  logic                       FlushWayFlag;
+  logic [NUMWAYS-1:0]         FlushWay;
+  logic [NUMWAYS-1:0]         NextFlushWay;
+  logic                       FlushWayCntEn;
+  logic                       FlushWayCntRst;  
+  logic                       SelEvict;
+  logic                       LRUWriteEn;
+  logic                       SelFlush;
+  logic                       ResetOrFlushAdr, ResetOrFlushWay;
+  logic [NUMWAYS-1:0]         WayHitSaved, WayHitRaw;
+  logic [NUMWAYS-1:0]         SelectedWay;
+  logic [NUMWAYS-1:0]         SetValidWay, ClearValidWay, SetDirtyWay, ClearDirtyWay;
+  logic [NUMWAYS-1:0]         WriteWordWayEn, WriteLineWayEn;
   
   /////////////////////////////////////////////////////////////////////////////////////////////
   // Read Path
@@ -184,7 +179,7 @@ module cache #(parameter LINELEN,  NUMLINES,  NUMWAYS, DCACHE = 1) (
   /////////////////////////////////////////////////////////////////////////////////////////////
 
   // *** change to structural
-  assign SelectedWay = SelFlush ? FlushWay : (FSMLineWriteEn ? VictimWay : WayHit);
+  mux3 #(NUMWAYS) selectwaymux(WayHit, VictimWay, FlushWay, {SelFlush, FSMLineWriteEn}, SelectedWay);
   assign SetValidWay = SetValid ? SelectedWay : '0;
   assign ClearValidWay = ClearValid ? SelectedWay : '0;
   assign SetDirtyWay = SetDirty ? SelectedWay : '0;