diff --git a/src/ieu/controller.sv b/src/ieu/controller.sv index 51284704..2b842836 100644 --- a/src/ieu/controller.sv +++ b/src/ieu/controller.sv @@ -150,15 +150,11 @@ module controller( ControlsD = `CTRLW'b0_000_00_00_000_0_0_0_0_0_0_0_0_0_00_1; // Non-implemented instruction 7'b0110011: if (Funct7D == 7'b0000000 | Funct7D == 7'b0100000) ControlsD = `CTRLW'b1_000_00_00_000_0_1_0_0_0_0_0_0_0_00_0; // R-type - else if (Funct7D == 7'b0000001 & (`M_SUPPORTED | (`ZMMUL_SUPPORTED & ~Funct3D[2]))) - ControlsD = `CTRLW'b1_000_00_00_011_0_0_0_0_0_0_0_0_1_00_0; // Multiply/divide else ControlsD = `CTRLW'b0_000_00_00_000_0_0_0_0_0_0_0_0_0_00_1; // Non-implemented instruction 7'b0110111: ControlsD = `CTRLW'b1_100_01_00_000_0_0_0_1_0_0_0_0_0_00_0; // lui 7'b0111011: if ((Funct7D == 7'b0000000 | Funct7D == 7'b0100000) & `XLEN == 64) ControlsD = `CTRLW'b1_000_00_00_000_0_1_0_0_1_0_0_0_0_00_0; // R-type W instructions for RV64i - else if (Funct7D == 7'b0000001 & (`M_SUPPORTED | (`ZMMUL_SUPPORTED & ~Funct3D[2])) & `XLEN == 64) - ControlsD = `CTRLW'b1_000_00_00_011_0_0_0_0_1_0_0_0_1_00_0; // W-type Multiply/Divide else ControlsD = `CTRLW'b0_000_00_00_000_0_0_0_0_0_0_0_0_0_00_1; // Non-implemented instruction 7'b1100011: ControlsD = `CTRLW'b0_010_11_00_000_1_0_0_0_0_0_0_0_0_00_0; // branches diff --git a/src/mdu/mul.sv b/src/mdu/mul.sv index 952b4daf..b388eb35 100644 --- a/src/mdu/mul.sv +++ b/src/mdu/mul.sv @@ -36,24 +36,7 @@ module mul( output logic [`XLEN*2-1:0] ProdM // double-widthproduct ); - // Number systems - // Let A' = sum(i=0, XLEN-2, A[i]*2^i) - // Unsigned: A = A' + A[XLEN-1]*2^(XLEN-1) - // Signed: A = A' - A[XLEN-1]*2^(XLEN-1) - // Multiplication: A*B - // Let P' = A' * B' - // PA = (A' * B[XLEN-1]) - // PB = (B' * A[XLEN-1]) - // PP = A[XLEN-1] * B[XLEN-1] - // Signed * Signed = P' + (-PA - PB)*2^(XLEN-1) + PP*2^(2XLEN-2) - // Signed * Unsigned = P' + ( PA - PB)*2^(XLEN-1) - PP*2^(2XLEN-2) - // Unsigned * Unsigned = P' + ( PA + PB)*2^(XLEN-1) + PP*2^(2XLEN-2) - - logic [`XLEN-1:0] Aprime, Bprime; // lower bits of source A and B - logic MULH, MULHSU; // type of multiply - logic [`XLEN-2:0] PA, PB; // product of msb and lsbs - logic PP; // product of msbs logic [`XLEN*2-1:0] PP1E, PP2E, PP3E, PP4E; // partial products logic [`XLEN*2-1:0] PP1M, PP2M, PP3M, PP4M; // registered partial proudcts @@ -61,24 +44,7 @@ module mul( // Execute Stage: Compute partial products ////////////////////////////// - assign Aprime = {1'b0, ForwardedSrcAE[`XLEN-2:0]}; - assign Bprime = {1'b0, ForwardedSrcBE[`XLEN-2:0]}; - assign PP1E = Aprime * Bprime; - assign PA = {(`XLEN-1){ForwardedSrcAE[`XLEN-1]}} & ForwardedSrcBE[`XLEN-2:0]; - assign PB = {(`XLEN-1){ForwardedSrcBE[`XLEN-1]}} & ForwardedSrcAE[`XLEN-2:0]; - assign PP = ForwardedSrcAE[`XLEN-1] & ForwardedSrcBE[`XLEN-1]; - - // flavor of multiplication - assign MULH = (Funct3E == 3'b001); - assign MULHSU = (Funct3E == 3'b010); - - // Select partial products, handling signed multiplication - assign PP2E = {2'b00, (MULH | MULHSU) ? ~PA : PA, {(`XLEN-1){1'b0}}}; - assign PP3E = {2'b00, (MULH) ? ~PB : PB, {(`XLEN-1){1'b0}}}; - always_comb - if (MULH) PP4E = {1'b1, PP, {(`XLEN-3){1'b0}}, 1'b1, {(`XLEN){1'b0}}}; - else if (MULHSU) PP4E = {1'b1, ~PP, {(`XLEN-2){1'b0}}, 1'b1, {(`XLEN-1){1'b0}}}; - else PP4E = {1'b0, PP, {(`XLEN*2-2){1'b0}}}; + // insert stuff here for lab 5 ////////////////////////////// // Memory Stage: Sum partial proudcts