diff --git a/examples/fp/fpcalc/fpcalc.c b/examples/fp/fpcalc/fpcalc.c
index f41494c7..94bfc9ac 100644
--- a/examples/fp/fpcalc/fpcalc.c
+++ b/examples/fp/fpcalc/fpcalc.c
@@ -157,7 +157,7 @@ void softfloatInit(void) {
     //                 RM:  softfloat_round_min
     softfloat_roundingMode = softfloat_round_near_even; 
     softfloat_exceptionFlags = 0; // clear exceptions
-    softfloat_detectTininess = softfloat_tininess_beforeRounding; // RISC-V behavior for tininess
+    softfloat_detectTininess = softfloat_tininess_afterRounding; // RISC-V behavior for tininess
 }
 
 uint64_t parseNum(char *num) {
diff --git a/examples/fp/softfloat_demo/softfloat_demo.c b/examples/fp/softfloat_demo/softfloat_demo.c
index 918682ba..0f7ba6f0 100644
--- a/examples/fp/softfloat_demo/softfloat_demo.c
+++ b/examples/fp/softfloat_demo/softfloat_demo.c
@@ -37,7 +37,7 @@ void softfloatInit(void) {
     //                 RM:  softfloat_round_min
     softfloat_roundingMode = softfloat_round_near_even; 
     softfloat_exceptionFlags = 0; // clear exceptions
-    softfloat_detectTininess = softfloat_tininess_beforeRounding; // RISC-V behavior for tininess
+    softfloat_detectTininess = softfloat_tininess_afterRounding; // RISC-V behavior for tininess
 }
 
 int main()
diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h
index fdfc3e6d..319f2233 100644
--- a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h
@@ -857,6 +857,7 @@ trap_handler_end_\MODE\(): // place to jump to so we can skip the trap handler a
     addi a6, a6, 8 
 .endm
 
+// Place this macro in peripheral tests to setup all the PLIC registers to generate external interrupts
 .macro SETUP_PLIC  
     # Setup PLIC with a series of register writes