From 7801ed48b355efb838553aded3e960a3e6273376 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Thu, 25 Aug 2022 18:19:41 -0700
Subject: [PATCH] Removed UncachedRW

---
 pipelined/src/lsu/busfsm.sv | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/pipelined/src/lsu/busfsm.sv b/pipelined/src/lsu/busfsm.sv
index 129f42d9..bb1c1461 100644
--- a/pipelined/src/lsu/busfsm.sv
+++ b/pipelined/src/lsu/busfsm.sv
@@ -55,7 +55,7 @@ module busfsm #(parameter integer LOGWPL)
   logic 			   UnCachedBusRead;
   logic 			   UnCachedBusWrite;
   logic 			   WordCountFlag;
-  logic 			   UnCachedAccess, UnCachedRW;
+  logic 			   UnCachedAccess;
   logic [2:0]    LocalBurstType;
   
 
@@ -100,8 +100,8 @@ module busfsm #(parameter integer LOGWPL)
 
   assign LocalBurstType = 3'b000;
 
-  assign HBURST = (UnCachedRW) ? 3'b0 : LocalBurstType; // Don't want to use burst when doing an Uncached Access.
-  assign BusTransComplete = (UnCachedRW) ? BusAck : WordCountFlag & BusAck;
+  assign HBURST = 3'b0;
+  assign BusTransComplete = BusAck;
   // Use SEQ if not doing first word, NONSEQ if doing the first read/write, and IDLE if finishing up.
   assign HTRANS = (BusRead | BusWrite) & (~BusTransComplete) ? AHB_NONSEQ : AHB_IDLE; 
    
@@ -119,8 +119,5 @@ module busfsm #(parameter integer LOGWPL)
   assign BusRead = UnCachedBusRead;
   assign BufferCaptureEn = UnCachedBusRead;
 
-  // Makes bus only do uncached reads/writes when we actually do uncached reads/writes. Needed because Cacheable is 0 when flushing cache.
-  assign UnCachedRW = UnCachedBusWrite | UnCachedBusRead; 
-
-   assign BusCommitted = BusCurrState != STATE_BUS_READY;
+  assign BusCommitted = BusCurrState != STATE_BUS_READY;
 endmodule