From 6f6663cd67263ccdbe3fb4a2783fc8c6d355517f Mon Sep 17 00:00:00 2001
From: bbracker <bbracker@hmc.edu>
Date: Fri, 25 Mar 2022 01:02:22 +0000
Subject: [PATCH] fix multiple-context PLIC checkpoint generation

---
 linux/testvector-generation/parsePlicState.py |  2 +-
 pipelined/testbench/testbench-linux.sv        | 20 ++++++++++++++++---
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/linux/testvector-generation/parsePlicState.py b/linux/testvector-generation/parsePlicState.py
index 35ef00b1..b917bfdc 100755
--- a/linux/testvector-generation/parsePlicState.py
+++ b/linux/testvector-generation/parsePlicState.py
@@ -101,7 +101,7 @@ with open(outDir+'checkpoint-PLIC_INT_PRIORITY', 'w') as outFile:
         outFile.write(stripZeroes(word[2:])+'\n')
 with open(outDir+'checkpoint-PLIC_INT_ENABLE', 'w') as outFile:
     for word in plicIntEnableArray:
-        outFile.write(word+'\n')
+        outFile.write(stripZeroes(word)+'\n')
 with open(outDir+'checkpoint-PLIC_THRESHOLD', 'w') as outFile:
     for word in plicIntPriorityThresholdArray:
         outFile.write(stripZeroes(word[2:])+'\n')
diff --git a/pipelined/testbench/testbench-linux.sv b/pipelined/testbench/testbench-linux.sv
index 36153d73..12950b63 100644
--- a/pipelined/testbench/testbench-linux.sv
+++ b/pipelined/testbench/testbench-linux.sv
@@ -266,6 +266,19 @@ module testbench;
       end \
     end
 
+  `define INIT_CHECKPOINT_PACKED_ARRAY(SIGNAL,DIM,ARRAY_MAX,ARRAY_MIN) \
+    `MAKE_CHECKPOINT_INIT_SIGNAL(SIGNAL,DIM,ARRAY_MAX,ARRAY_MIN) \
+    for (i=ARRAY_MIN; i<ARRAY_MAX+1; i=i+1) begin \
+      initial begin \
+        if (CHECKPOINT!=0) begin \
+          force `SIGNAL[i] = init``SIGNAL[i]; \
+          while (reset!==1) #1; \
+          while (reset!==0) #1; \
+          #1; \
+          release `SIGNAL[i]; \
+        end \
+      end \
+    end
   // For the annoying case where the pathname to the array elements includes
   // a "genblk<i>" in the signal name
   `define INIT_CHECKPOINT_GENBLK_ARRAY(SIGNAL_BASE,SIGNAL,DIM,ARRAY_MAX,ARRAY_MIN) \
@@ -296,6 +309,7 @@ module testbench;
       end \
     end
 
+  genvar i;
   `INIT_CHECKPOINT_SIMPLE_ARRAY(RF,         [`XLEN-1:0],31,1);
   `INIT_CHECKPOINT_SIMPLE_ARRAY(HPMCOUNTER, [`XLEN-1:0],`COUNTERS-1,0);
   `INIT_CHECKPOINT_VAL(PC,         [`XLEN-1:0]);
@@ -333,9 +347,9 @@ module testbench;
   //`INIT_CHECKPOINT_VAL(UART_LSR,   [7:0]);
   //`INIT_CHECKPOINT_VAL(UART_MSR,   [7:0]);
   `INIT_CHECKPOINT_VAL(UART_SCR,   [7:0]);
-  `INIT_CHECKPOINT_SIMPLE_ARRAY(PLIC_INT_PRIORITY, [2:0],`PLIC_NUM_SRC,1);
-  `INIT_CHECKPOINT_SIMPLE_ARRAY(PLIC_INT_ENABLE, [`PLIC_NUM_SRC:1],1,0);
-  `INIT_CHECKPOINT_SIMPLE_ARRAY(PLIC_THRESHOLD, [2:0],1,0);
+  `INIT_CHECKPOINT_PACKED_ARRAY(PLIC_INT_PRIORITY, [2:0],`PLIC_NUM_SRC,1);
+  `INIT_CHECKPOINT_PACKED_ARRAY(PLIC_INT_ENABLE, [`PLIC_NUM_SRC:1],1,0);
+  `INIT_CHECKPOINT_PACKED_ARRAY(PLIC_THRESHOLD, [2:0],1,0);
 
   integer memFile;
   integer readResult;