diff --git a/pipelined/src/ifu/ifu.sv b/pipelined/src/ifu/ifu.sv
index 8da0dd51..7a9911aa 100644
--- a/pipelined/src/ifu/ifu.sv
+++ b/pipelined/src/ifu/ifu.sv
@@ -265,6 +265,7 @@ module ifu (
       assign CacheCommittedF = '0;
       if(`IROM_SUPPORTED) mux2 #(32) UnCachedDataMux2(FetchBuffer, IROMInstrF, SelIROM, InstrRawF);
       else assign InstrRawF = FetchBuffer;
+      assign CacheCommittedF = 1'b0;
       assign IFUHBURST = 3'b0;
       assign {ICacheFetchLine, ICacheStallF, FinalInstrRawF} = '0;
       assign {ICacheMiss, ICacheAccess} = '0;
diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh
index af2a7ace..2d32ea39 100644
--- a/pipelined/testbench/tests.vh
+++ b/pipelined/testbench/tests.vh
@@ -1911,7 +1911,7 @@ string imperas32f[] = '{
 
  string wally32periph[] = '{
     `WALLYTEST,
-    //"rv32i_m/privilege/src/WALLY-periph-01.S",
+    "rv32i_m/privilege/src/WALLY-periph-01.S",
     "rv32i_m/privilege/src/WALLY-gpio-01.S",
     "rv32i_m/privilege/src/WALLY-clint-01.S",
     "rv32i_m/privilege/src/WALLY-uart-01.S",