From 6ac54a180ea09d5547943e3648a32de970dd3604 Mon Sep 17 00:00:00 2001 From: Kevin Kim Date: Wed, 15 Feb 2023 17:37:09 -0800 Subject: [PATCH] zbc and carry-less multiply work properly --- src/ieu/bmu/clmul.sv | 41 +++++++++++++++-------------------------- src/ieu/bmu/zbc.sv | 34 ++++++++++++++-------------------- 2 files changed, 29 insertions(+), 46 deletions(-) diff --git a/src/ieu/bmu/clmul.sv b/src/ieu/bmu/clmul.sv index f1917f55..280c3fbd 100644 --- a/src/ieu/bmu/clmul.sv +++ b/src/ieu/bmu/clmul.sv @@ -1,5 +1,5 @@ /////////////////////////////////////////// -// clmul.sv +// clmul.sv (carry-less multiplier) // // Written: Kevin Kim and Kip Macsai-Goren // Created: 1 February 2023 @@ -30,35 +30,24 @@ `include "wally-config.vh" module clmul #(parameter WIDTH=32) ( - input logic [WIDTH-1:0] A, B, // Operands + input logic [WIDTH-1:0] A, B, // Operands output logic [WIDTH-1:0] ClmulResult); // ZBS result - logic [WIDTH-1:0] pp [WIDTH-1:0]; //partial AND products - // Note: only generates the bottom WIDTH bits of the carryless multiply. - // To get the high bits or the reversed bits, the inputs can be shifted and reversed - // as they are in zbc where this is instantiated - /* - genvar i; - for (i=0; i CLMUL -> MUX -> RESULT - //alternate could have CLMUL * 3 -> MUX -> MUX always_comb begin casez (Funct3) 3'b001: begin //clmul - X = A; - Y = B; + x = A; + y = B; end 3'b011: begin //clmulh - X = {RevA[WIDTH-2:0], {1'b0}}; - Y = {{1'b0}, RevB[WIDTH-2:0]}; + x = {RevA[WIDTH-2:0], {1'b0}}; + y = {{1'b0}, RevB[WIDTH-2:0]}; end 3'b010: begin //clmulr - X = {A[WIDTH-2:0], {1'b0}}; - Y = B; + x = RevA; + y = RevB; end default: begin - X = 0; - Y = 0; + x = 0; + y = 0; end endcase end - clmul clm(.A(X), .B(Y), .ClmulResult(ClmulResult)); - bitreverse brClmulResult(.a(ClmulResult), .b(RevClmulResult)); + clmul #(WIDTH) clm(.A(x), .B(y), .ClmulResult(ClmulResult)); + bitreverse #(WIDTH) brClmulResult(.a(ClmulResult), .b(RevClmulResult)); - assign ZBCResult = (Funct3 == 3'b011) ? RevClmulResult : ClmulResult; + assign ZBCResult = (Funct3 == 3'b011 || Funct3 == 3'b010) ? RevClmulResult : ClmulResult; endmodule \ No newline at end of file