diff --git a/wally-pipelined/src/fpu/fclassify.sv b/wally-pipelined/src/fpu/fclassify.sv index 35475ed5..35e9a80c 100644 --- a/wally-pipelined/src/fpu/fclassify.sv +++ b/wally-pipelined/src/fpu/fclassify.sv @@ -3,43 +3,18 @@ module fclassify ( input logic XSgnE, - input logic [51:0] XFracE, input logic XNaNE, input logic XSNaNE, input logic XNormE, input logic XDenormE, input logic XZeroE, input logic XInfE, - // input logic FmtE, // 0-Single 1-Double output logic [63:0] ClassResE ); - // logic XSgnE; - // logic Inf, NaN, Zero, Norm, Denorm; logic PInf, PZero, PNorm, PDenorm; logic NInf, NZero, NNorm, NDenorm; - // logic MaxExp, ExpZero, ManZero, FirstBitFrac; - - // Single and Double precision layouts - // assign XSgnE = FmtE ? FSrcXE[63] : FSrcXE[31]; - // basic calculations for readabillity - - // assign ExpZero = FmtE ? ~|FSrcXE[62:52] : ~|FSrcXE[30:23]; - // assign MaxExp = FmtE ? &FSrcXE[62:52] : &FSrcXE[30:23]; - // assign ManZero = FmtE ? ~|FSrcXE[51:0] : ~|FSrcXE[22:0]; - // assign FirstBitFrac = FmtE ? FSrcXE[51] : FSrcXE[22]; - - // determine the type of number - // assign NaN = MaxExp & ~ManZero; - // assign Inf = MaxExp & ManZero; - // assign Zero = ExpZero & ManZero; - // assign Denorm= ExpZero & ~ManZero; - // assign Norm = ~ExpZero; - - // determine the sub categories - // assign QNaN = FirstBitFrac&NaN; - // assign SNaN = ~FirstBitFrac&NaN; assign PInf = ~XSgnE&XInfE; assign NInf = XSgnE&XInfE; assign PNorm = ~XSgnE&XNormE; diff --git a/wally-pipelined/src/fpu/fma.sv b/wally-pipelined/src/fpu/fma.sv index a4105aa5..83fc166c 100644 --- a/wally-pipelined/src/fpu/fma.sv +++ b/wally-pipelined/src/fpu/fma.sv @@ -374,7 +374,7 @@ module fma2( assign UfLSBNormSum = FmtM ? NormSum[2] : NormSum[31]; // Deterimine if a small number was supposed to be subtrated - assign SubBySmallNum = AddendStickyM&InvZ&~(NormSumSticky)&~ZZeroM; + assign SubBySmallNum = AddendStickyM & InvZ & ~(NormSumSticky) & ~ZZeroM; always_comb begin // Determine if you add 1 diff --git a/wally-pipelined/src/fpu/fpu.sv b/wally-pipelined/src/fpu/fpu.sv index 344500d4..f5b62e7e 100755 --- a/wally-pipelined/src/fpu/fpu.sv +++ b/wally-pipelined/src/fpu/fpu.sv @@ -216,15 +216,15 @@ module fpu ( .FSrcXE, .FSrcYE, .FOpCtrlE, .FAddResM, .FAddFlgM); // first and only instance of floating-point comparator - fcmp fcmp (.op1({XSgnE,XExpE,XFracE}), .op2({YSgnE,YExpE,YFracE}), .FSrcXE, + fcmp fcmp (.op1({FSrcXE}), .op2({FSrcYE}), .FSrcXE, .FSrcYE, .FOpCtrlE(FOpCtrlE[2:0]), .FmtE, .Invalid(CmpNVE), .CmpResE, .XNaNE, .YNaNE, .XZeroE, .YZeroE); // first and only instance of floating-point sign converter - fsgn fsgn (.SgnOpCodeE(FOpCtrlE[1:0]), .XSgnE, .YSgnE, .XExpE, .XFracE, .FmtE, .SgnResE, .SgnNVE, .XExpMaxE); - + fsgn fsgn (.SgnOpCodeE(FOpCtrlE[1:0]), .XSgnE, .YSgnE, .FSrcXE, /*.XExpE, .XFracE, */.FmtE, .SgnResE, .SgnNVE, .XExpMaxE); + // first and only instance of floating-point classify unit - fclassify fclassify (.XSgnE, .XFracE, .XDenormE, .XZeroE, .XNaNE, .XInfE, .XNormE, .XSNaNE, .ClassResE); + fclassify fclassify (.XSgnE, .XDenormE, .XZeroE, .XNaNE, .XInfE, .XNormE, .XSNaNE, .ClassResE); fcvt fcvt (.XSgnE, .XExpE, .XFracE, .XAssumed1E, .XZeroE, .XNaNE, .XInfE, .XDenormE, .BiasE, .SrcAE, .FOpCtrlE, .FmtE, .FrmE, .CvtResE, .CvtFlgE); diff --git a/wally-pipelined/src/fpu/fsgn.sv b/wally-pipelined/src/fpu/fsgn.sv index 67865b64..83cb940f 100755 --- a/wally-pipelined/src/fpu/fsgn.sv +++ b/wally-pipelined/src/fpu/fsgn.sv @@ -2,8 +2,7 @@ module fsgn ( input logic XSgnE, YSgnE, - input logic [10:0] XExpE, - input logic [51:0] XFracE, + input logic [63:0] FSrcXE, input logic XExpMaxE, input logic FmtE, input logic [1:0] SgnOpCodeE, @@ -21,7 +20,7 @@ module fsgn ( // assign ResSgn = SgnOpCodeE[1] ? (XSgnE ^ YSgnE) : (YSgnE ^ SgnOpCodeE[0]); - assign SgnResE = FmtE ? {ResSgn, XExpE, XFracE} : {{32{1'b1}}, ResSgn, XExpE[7:0], XFracE[51:29]}; + assign SgnResE = FmtE ? {ResSgn, FSrcXE[62:0]} : {FSrcXE[63:32], ResSgn, FSrcXE[30:0]}; //If the exponent is all ones, then the value is either Inf or NaN, //both of which will produce a QNaN/SNaN value of some sort. This will diff --git a/wally-pipelined/src/fpu/unpacking.sv b/wally-pipelined/src/fpu/unpacking.sv index 1133a403..b7d3eabc 100644 --- a/wally-pipelined/src/fpu/unpacking.sv +++ b/wally-pipelined/src/fpu/unpacking.sv @@ -24,9 +24,9 @@ module unpacking ( assign Addend = FOpCtrlE[2] ? 64'b0 : Z; // Z is only used in the FMA, and is set to Zero if a multiply opperation assign XSgnE = FmtE ? X[63] : X[31]; assign YSgnE = FmtE ? Y[63] : Y[31]; - assign ZSgnE = FmtE ? Addend[63]^FOpCtrlE[0] : Addend[31]^FOpCtrlE[0]; + assign ZSgnE = FmtE ? Addend[63]^FOpCtrlE[0] : Addend[31]^FOpCtrlE[0]; // *** Maybe this should be done in the FMA for modularity? - assign XExpE = FmtE ? X[62:52] : {3'b0, X[30:23]}; + assign XExpE = FmtE ? X[62:52] : {3'b0, X[30:23]}; // *** maybe convert to full number of bits here? assign YExpE = FmtE ? Y[62:52] : {3'b0, Y[30:23]}; assign ZExpE = FmtE ? Addend[62:52] : {3'b0, Addend[30:23]}; @@ -34,7 +34,7 @@ module unpacking ( assign YFracE = FmtE ? Y[51:0] : {Y[22:0], 29'b0}; assign ZFracE = FmtE ? Addend[51:0] : {Addend[22:0], 29'b0}; - assign XAssumed1E = |XExpE; + assign XAssumed1E = |XExpE; // *** should these be prepended now to create a significand? assign YAssumed1E = |YExpE; assign ZAssumed1E = |ZExpE; @@ -72,6 +72,6 @@ module unpacking ( assign YZeroE = YExpZero & YFracZero; assign ZZeroE = ZExpZero & ZFracZero; - assign BiasE = FmtE ? 13'h3ff : 13'h7f; + assign BiasE = FmtE ? 13'h3ff : 13'h7f; // *** is it better to convert to full precision exponents so bias isn't needed? endmodule \ No newline at end of file