From 568d0031d216ccdc0617045f6ae65ada11cc61b8 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Sun, 12 Mar 2023 17:15:56 -0500 Subject: [PATCH] Modified the branch log to include markers for the start and end of tests with exclusion of warmup period. --- testbench/testbench.sv | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/testbench/testbench.sv b/testbench/testbench.sv index b0af190a..6c9315ee 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -69,6 +69,7 @@ logic [3:0] dummy; logic DCacheFlushDone, DCacheFlushStart; logic riscofTest; + logic StartSample, EndSample; flopenr #(`XLEN) PCWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.PCM, PCW); flopenr #(32) InstrWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.InstrM, InstrW); @@ -405,8 +406,7 @@ logic [3:0] dummy; integer HPMCindex; logic StartSampleFirst; logic StartSampleDelayed; - logic StartSample; - logic EndSample, EndSampleFirst, EndSampleDelayed; + logic EndSampleFirst, EndSampleDelayed; logic [`XLEN-1:0] InitialHPMCOUNTERH[`COUNTERS-1:0]; string HPMCnames[] = '{"Mcycle", @@ -549,10 +549,12 @@ logic [3:0] dummy; file = $fopen("branch.log", "w"); end always @(posedge clk) begin + if(StartSample) $fwrite(file, "BEGIN %s\n", memfilename); if(dut.core.ifu.InstrClassM[0] & ~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin direction = PCSrcM ? "t" : "n"; $fwrite(file, "%h %s\n", dut.core.PCM, direction); end + if(EndSample) $fwrite(file, "END %s\n", memfilename); end end end