diff --git a/wally-pipelined/config/buildroot/wally-config.vh b/wally-pipelined/config/buildroot/wally-config.vh index 3a834ab0..8bf0b381 100644 --- a/wally-pipelined/config/buildroot/wally-config.vh +++ b/wally-pipelined/config/buildroot/wally-config.vh @@ -49,9 +49,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 // Domenico Ottolia 4/15: Support for vectored interrupts in _tvec csrs. Just implemented in src/privileged/trap.sv around line 75. Pretty sure this should be 1. +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 16 diff --git a/wally-pipelined/config/busybear/wally-config.vh b/wally-pipelined/config/busybear/wally-config.vh index d3822863..8ad4292b 100644 --- a/wally-pipelined/config/busybear/wally-config.vh +++ b/wally-pipelined/config/busybear/wally-config.vh @@ -50,9 +50,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 // Domenico Ottolia 4/15: Support for vectored interrupts in _tvec csrs. Just implemented in src/privileged/trap.sv around line 75. Pretty sure this should be 1. +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 16 diff --git a/wally-pipelined/config/coremark-64i/wally-config.vh b/wally-pipelined/config/coremark-64i/wally-config.vh index ae3100c6..ade6f3cb 100644 --- a/wally-pipelined/config/coremark-64i/wally-config.vh +++ b/wally-pipelined/config/coremark-64i/wally-config.vh @@ -50,6 +50,17 @@ // Bus Interface width `define AHBW 64 +// TLB configuration. Entries should be a power of 2 +`define ITLB_ENTRIES 32 +`define DTLB_ENTRIES 32 + +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Peripheral Addresses // Peripheral memory space extends from BASE to BASE+RANGE // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits diff --git a/wally-pipelined/config/coremark/wally-config.vh b/wally-pipelined/config/coremark/wally-config.vh index e4e3376d..b8fc305c 100644 --- a/wally-pipelined/config/coremark/wally-config.vh +++ b/wally-pipelined/config/coremark/wally-config.vh @@ -49,9 +49,17 @@ `define MEM_VIRTMEM 0 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Address space `define RESET_VECTOR 64'h00000000000100b0 diff --git a/wally-pipelined/config/coremark_bare/wally-config.vh b/wally-pipelined/config/coremark_bare/wally-config.vh index 45f04cff..8d3fcfe7 100644 --- a/wally-pipelined/config/coremark_bare/wally-config.vh +++ b/wally-pipelined/config/coremark_bare/wally-config.vh @@ -50,9 +50,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 64 diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh index 8b63c56a..d6b3327c 100644 --- a/wally-pipelined/config/rv32ic/wally-config.vh +++ b/wally-pipelined/config/rv32ic/wally-config.vh @@ -48,9 +48,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 16 diff --git a/wally-pipelined/config/rv32icfd/wally-config.vh b/wally-pipelined/config/rv32icfd/wally-config.vh index 28fc5a50..2b9f9dfd 100644 --- a/wally-pipelined/config/rv32icfd/wally-config.vh +++ b/wally-pipelined/config/rv32icfd/wally-config.vh @@ -48,9 +48,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 16 diff --git a/wally-pipelined/config/rv64BP/wally-config.vh b/wally-pipelined/config/rv64BP/wally-config.vh index 01680b9d..aa9b96a9 100644 --- a/wally-pipelined/config/rv64BP/wally-config.vh +++ b/wally-pipelined/config/rv64BP/wally-config.vh @@ -50,9 +50,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Address space `define RESET_VECTOR 64'h0000000000000000 diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh index 3235c623..aed12cb9 100644 --- a/wally-pipelined/config/rv64ic/wally-config.vh +++ b/wally-pipelined/config/rv64ic/wally-config.vh @@ -49,9 +49,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 64 diff --git a/wally-pipelined/config/rv64icfd/wally-config.vh b/wally-pipelined/config/rv64icfd/wally-config.vh index ac7f4ec6..f2d0816c 100644 --- a/wally-pipelined/config/rv64icfd/wally-config.vh +++ b/wally-pipelined/config/rv64icfd/wally-config.vh @@ -49,9 +49,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Legal number of PMP entries are 0, 16, or 64 `define PMP_ENTRIES 16 diff --git a/wally-pipelined/config/rv64imc/wally-config.vh b/wally-pipelined/config/rv64imc/wally-config.vh index 925e9865..a51a951e 100644 --- a/wally-pipelined/config/rv64imc/wally-config.vh +++ b/wally-pipelined/config/rv64imc/wally-config.vh @@ -48,9 +48,17 @@ `define MEM_VIRTMEM 1 `define VECTORED_INTERRUPTS_SUPPORTED 1 +// TLB configuration. Entries should be a power of 2 `define ITLB_ENTRIES 32 `define DTLB_ENTRIES 32 +// Cache configuration. Sizes should be a power of two +// typical configuration 4 ways, 4096 bytes per way, 256 bit or more blocks +`define DCACHE_NUMWAYS 4 +`define DCACHE_WAYSIZEINBYTES 2048 +`define DCACHE_BLOCKLENINBITS 256 +`define DCACHE_REPLBITS 3 + // Address space `define RESET_VECTOR 64'h0000000080000000