From 4a3503281fbfbbda6b3e9e5ce951c37df12f7477 Mon Sep 17 00:00:00 2001 From: bbracker Date: Sat, 17 Jul 2021 14:46:18 -0400 Subject: [PATCH 1/3] swapped out linux testbench signal names --- wally-pipelined/regression/wave-dos/linux-waves.do | 7 +++---- wally-pipelined/regression/wave-dos/peripheral-waves.do | 6 +++--- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/wally-pipelined/regression/wave-dos/linux-waves.do b/wally-pipelined/regression/wave-dos/linux-waves.do index 843ed274..7ca0e3c9 100644 --- a/wally-pipelined/regression/wave-dos/linux-waves.do +++ b/wally-pipelined/regression/wave-dos/linux-waves.do @@ -43,10 +43,9 @@ add wave /testbench/InstrMName add wave -hex /testbench/dut/hart/ifu/InstrM add wave -hex /testbench/dut/hart/ieu/c/InstrValidM add wave /testbench/dut/uncore/dtim/memwrite -add wave -hex /testbench/dut/uncore/HADDR -add wave -hex /testbench/HWRITE -add wave -hex /testbench/dut/uncore/HWDATA -add wave -hex /testbench/HRDATA +add wave -hex /testbench/dut/hart/lsu/dcache/MemRWM +add wave -hex /testbench/dut/hart/lsu/dcache/MemPAdrM +add wave -hex /testbench/dut/hart/lsu/dcache/ReadDataM add wave -hex /testbench/readAdrExpected add wave -divider W add wave -hex /testbench/PCW diff --git a/wally-pipelined/regression/wave-dos/peripheral-waves.do b/wally-pipelined/regression/wave-dos/peripheral-waves.do index 59515fd0..b3e7099c 100644 --- a/wally-pipelined/regression/wave-dos/peripheral-waves.do +++ b/wally-pipelined/regression/wave-dos/peripheral-waves.do @@ -43,9 +43,9 @@ add wave -hex /testbench/dut/hart/ieu/c/InstrValidM add wave /testbench/InstrMName add wave /testbench/dut/uncore/dtim/memwrite add wave -hex /testbench/dut/hart/WriteDataM -add wave -hex /testbench/dut/uncore/HADDR -add wave -hex /testbench/dut/uncore/HWDATA -add wave -hex /testbench/dut/uncore/HRDATA +add wave -hex /testbench/dut/hart/lsu/dcache/MemPAdrM +add wave -hex /testbench/dut/hart/lsu/dcache/WriteDataM +add wave -hex /testbench/dut/hart/lsu/dcache/ReadDataM add wave -hex /testbench/dut/hart/ebu/ReadDataM add wave -divider add wave -hex /testbench/PCW From 82fc766819d9fcb31325983f57f22fed283f7cbb Mon Sep 17 00:00:00 2001 From: bbracker Date: Sat, 17 Jul 2021 14:48:12 -0400 Subject: [PATCH 2/3] swapped out linux testbench signal names --- wally-pipelined/testbench/linux_comments.txt | 9 --- wally-pipelined/testbench/testbench-linux.sv | 77 +++++++++----------- 2 files changed, 35 insertions(+), 51 deletions(-) delete mode 100644 wally-pipelined/testbench/linux_comments.txt diff --git a/wally-pipelined/testbench/linux_comments.txt b/wally-pipelined/testbench/linux_comments.txt deleted file mode 100644 index 5d5cc9ce..00000000 --- a/wally-pipelined/testbench/linux_comments.txt +++ /dev/null @@ -1,9 +0,0 @@ -dut.HRDATA => dut.hart.lsu.dcache.ReadDataM -HADDR => dut.hart.lsu.dcache.MemPAdrM -HWDATA => dut.hart.lsu.dcache.WriteDataM -HWRITE => dut.hart.lsu.dcache.MemRWM -HTRANS => |dut.hart.lsu.dcache.MemRWM | |dut.hart.lsu.dcache.AtomicM - -HSIZE (probalby don't need anymore, read masking not necessary) -HRDATA (no physical change, just rename to something else) - diff --git a/wally-pipelined/testbench/testbench-linux.sv b/wally-pipelined/testbench/testbench-linux.sv index 18ef74ff..73387be6 100644 --- a/wally-pipelined/testbench/testbench-linux.sv +++ b/wally-pipelined/testbench/testbench-linux.sv @@ -27,7 +27,7 @@ module testbench(); - parameter waveOnICount = `BUSYBEAR*140000 + `BUILDROOT*2400000; // # of instructions at which to turn on waves in graphical sim + parameter waveOnICount = `BUSYBEAR*140000 + `BUILDROOT*0000001; // # of instructions at which to turn on waves in graphical sim parameter stopICount = `BUSYBEAR*143898 + `BUILDROOT*0000000; // # instructions at which to halt sim completely (set to 0 to let it run as far as it can) /////////////////////////////////////////////////////////////////////////////// @@ -35,7 +35,7 @@ module testbench(); /////////////////////////////////////////////////////////////////////////////// logic clk, reset; - logic [`AHBW-1:0] HRDATA; + logic [`AHBW-1:0] readDataExpected; logic [31:0] HADDR; logic [`AHBW-1:0] HWDATA; logic HWRITE; @@ -94,7 +94,6 @@ module testbench(); integer regNumExpected; integer data_file_rf, scan_file_rf; // Bus Unit Read/Write Checking - logic [63:0] readMask; logic [`XLEN-1:0] readAdrExpected, readAdrTranslated; logic [`XLEN-1:0] writeDataExpected, writeAdrExpected, writeAdrTranslated; integer data_file_memR, scan_file_memR; @@ -161,13 +160,13 @@ module testbench(); if (dut.hart.priv.csr.genblk1.csrm.MCAUSE_REGW == 2 && instrs > 1) begin $display("!!!!!! illegal instruction !!!!!!!!!!"); $display("(as a reminder, MCAUSE and MEPC are set by this)"); - $display("at %0t ps, PCM %x, instr %0d, HADDR %x", $time, dut.hart.ifu.PCM, instrs, HADDR); + $display("at %0t ps, PCM %x, instr %0d, dut.hart.lsu.dcache.MemPAdrM %x", $time, dut.hart.ifu.PCM, instrs, dut.hart.lsu.dcache.MemPAdrM); `ERROR end if (dut.hart.priv.csr.genblk1.csrm.MCAUSE_REGW == 5 && instrs != 0) begin $display("!!!!!! illegal (physical) memory access !!!!!!!!!!"); $display("(as a reminder, MCAUSE and MEPC are set by this)"); - $display("at %0t ps, PCM %x, instr %0d, HADDR %x", $time, dut.hart.ifu.PCM, instrs, HADDR); + $display("at %0t ps, PCM %x, instr %0d, dut.hart.lsu.dcache.MemPAdrM %x", $time, dut.hart.ifu.PCM, instrs, dut.hart.lsu.dcache.MemPAdrM); `ERROR end end @@ -195,7 +194,7 @@ module testbench(); // Big Chunky Block // ---------------- always @(reset or dut.hart.ifu.InstrRawD or dut.hart.ifu.PCD) begin// or negedge dut.hart.ifu.StallE) begin // Why do we care about StallE? Everything seems to run fine without it. - if(~HWRITE) begin // *** Should this need to consider HWRITE? + if(~dut.hart.lsu.dcache.MemRWM) begin // *** Should this need to consider dut.hart.lsu.dcache.MemRWM? #2; // If PCD/InstrD aren't garbage if (~reset && dut.hart.ifu.InstrRawD[15:0] !== {16{1'bx}} && dut.hart.ifu.PCD !== 64'h0) begin // && ~dut.hart.ifu.StallE) begin @@ -298,7 +297,7 @@ module testbench(); `SCAN_PC(data_file_PCF, scan_file_PCF, PCtextF, PCtextF2, InstrFExpected, PCFexpected); `SCAN_PC(data_file_PCD, scan_file_PCD, PCtextD, PCtextD2, InstrDExpected, PCDexpected); scan_file_memR = $fscanf(data_file_memR, "%x\n", readAdrExpected); - scan_file_memR = $fscanf(data_file_memR, "%x\n", HRDATA); + scan_file_memR = $fscanf(data_file_memR, "%x\n", readDataExpected); // Next force a timer interrupt (*** this may later need generalizing) force dut.uncore.genblk1.clint.MTIME = dut.uncore.genblk1.clint.MTIMECMP + 1; while (clk != 0) #1; @@ -334,7 +333,9 @@ module testbench(); `SCAN_PC(data_file_PCM, scan_file_PCM, trashString, trashString, InstrMExpected, PCMexpected); end - logging logging(clk, reset, dut.uncore.HADDR, dut.uncore.HTRANS); + // Removed because this is MMU's job + // and it'd take some work to upgrade away from Bus to Cache signals) + //logging logging(clk, reset, dut.uncore.dut.hart.lsu.dcache.MemPAdrM, dut.uncore.HWRITE); // ------------------- // Additional Hardware @@ -427,11 +428,6 @@ module testbench(); // RAM and bootram are addressed in 64-bit blocks - this logic handles R/W // including subwords. Brief explanation on signals: // - // readMask: bitmask of bits to read / write, left-shifted to align with - // nearest 64-bit boundary - examples - // HSIZE = 0 -> readMask = 11111111 - // HSIZE = 1 -> readMask = 1111111111111111 - // // In the linux boot, the processor spends the first ~5 instructions in // bootram, before jr jumps to main RAM @@ -456,33 +452,31 @@ module testbench(); // ------------ // Read Checker // ------------ - assign readMask = ((1 << (8*(1 << HSIZE))) - 1) << 8 * HADDR[2:0]; - always @(dut.HRDATA) begin + always @(dut.hart.lsu.dcache.ReadDataM) begin #2; if (dut.hart.MemRWM[1] && (dut.hart.ebu.CaptureDataM) - && dut.HRDATA !== {64{1'bx}}) begin + && dut.hart.lsu.dcache.ReadDataM !== {64{1'bx}}) begin if($feof(data_file_memR)) begin $display("no more memR data to read"); `ERROR end scan_file_memR = $fscanf(data_file_memR, "%x\n", readAdrExpected); - scan_file_memR = $fscanf(data_file_memR, "%x\n", HRDATA); + scan_file_memR = $fscanf(data_file_memR, "%x\n", readDataExpected); assign readAdrTranslated = adrTranslator(readAdrExpected); - if (~(HADDR === readAdrTranslated)) begin - $display("%0t ps, PCM %x %s, instr %0d: HADDR does not equal readAdrExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, HADDR, readAdrTranslated); + if (~(dut.hart.lsu.dcache.MemPAdrM === readAdrTranslated)) begin + $display("%0t ps, PCM %x %s, instr %0d: dut.hart.lsu.dcache.MemPAdrM does not equal readAdrExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, dut.hart.lsu.dcache.MemPAdrM, readAdrTranslated); `ERROR end - if ((readMask & HRDATA) !== (readMask & dut.HRDATA)) begin - if (HADDR inside `LINUX_FIX_READ) begin - if (HADDR != 'h10000005) // Suppress the warning for UART LSR so we can read UART output - $display("warning %0t ps, PCM %x %s, instr %0d, adr %0d: forcing HRDATA to expected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, HADDR, HRDATA, dut.HRDATA); - force dut.uncore.HRDATA = HRDATA; + if (readDataExpected !== dut.hart.lsu.dcache.ReadDataM) begin + if (dut.hart.lsu.dcache.MemPAdrM inside `LINUX_FIX_READ) begin + if (dut.hart.lsu.dcache.MemPAdrM != 'h10000005) // Suppress the warning for UART LSR so we can read UART output + $display("warning %0t ps, PCM %x %s, instr %0d, adr %0d: forcing readDataExpected to expected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, dut.hart.lsu.dcache.MemPAdrM, readDataExpected, dut.hart.lsu.dcache.ReadDataM); + force dut.hart.lsu.dcache.ReadDataM = readDataExpected; #9; - release dut.uncore.HRDATA; - warningCount += 1; + release dut.hart.lsu.dcache.ReadDataM; end else begin - $display("%0t ps, PCM %x %s, instr %0d: ExpectedHRDATA does not equal dut.HRDATA: %x, %x from address %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, HRDATA, dut.HRDATA, HADDR, HSIZE); + $display("%0t ps, PCM %x %s, instr %0d: ExpectedreadDataExpected does not equal dut.hart.lsu.dcache.ReadDataM: %x, %x from address %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, readDataExpected, dut.hart.lsu.dcache.ReadDataM, dut.hart.lsu.dcache.MemPAdrM); `ERROR end end @@ -493,8 +487,7 @@ module testbench(); // Write Checker // ------------- // this might need to change - //always @(HWDATA or HADDR or HSIZE or HWRITE) begin - always @(negedge HWRITE) begin + always @(negedge dut.hart.lsu.dcache.MemRWM) begin //#1; if (($time != 0) && ~dut.hart.hzu.FlushM) begin if($feof(data_file_memW)) begin @@ -505,12 +498,12 @@ module testbench(); scan_file_memW = $fscanf(data_file_memW, "%x\n", writeAdrExpected); assign writeAdrTranslated = adrTranslator(writeAdrExpected); - if (writeDataExpected != HWDATA && ~dut.uncore.HSELPLICD) begin - $display("%0t ps, PCM %x %s, instr %0d: HWDATA does not equal writeDataExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, HWDATA, writeDataExpected); + if (writeDataExpected != dut.hart.lsu.dcache.WriteDataM && ~dut.uncore.HSELPLICD) begin + $display("%0t ps, PCM %x %s, instr %0d: dut.hart.lsu.dcache.WriteDataM does not equal writeDataExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, dut.hart.lsu.dcache.WriteDataM, writeDataExpected); `ERROR end - if (~(writeAdrTranslated === HADDR) && ~dut.uncore.HSELPLICD) begin - $display("%0t ps, PCM %x %s, instr %0d: HADDR does not equal writeAdrExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, HADDR, writeAdrTranslated); + if (~(writeAdrTranslated === dut.hart.lsu.dcache.MemPAdrM) && ~dut.uncore.HSELPLICD) begin + $display("%0t ps, PCM %x %s, instr %0d: dut.hart.lsu.dcache.MemPAdrM does not equal writeAdrExpected: %x, %x", $time, dut.hart.ifu.PCM, PCtextM, instrs, dut.hart.lsu.dcache.MemPAdrM, writeAdrTranslated); `ERROR end end @@ -720,15 +713,15 @@ module testbench(); endfunction endmodule -module logging( - input logic clk, reset, - input logic [31:0] HADDR, - input logic [1:0] HTRANS); - - always @(posedge clk) - if (HTRANS != 2'b00 && HADDR == 0) - $display("Warning: access to memory address 0\n"); -endmodule +//module logging( +// input logic clk, reset, +// input logic [31:0] dut.hart.lsu.dcache.MemPAdrM, +// input logic [1:0] (|dut.hart.lsu.dcache.MemRWM || dut.hart.lsu.dcache.AtomicM)); +// +// always @(posedge clk) +// if ((|dut.hart.lsu.dcache.MemRWM || dut.hart.lsu.dcache.AtomicM) != 2'b00 && dut.hart.lsu.dcache.MemPAdrM == 0) +// $display("Warning: access to memory address 0\n"); +//endmodule module instrTrackerTB( From 8d65d50085628ea777f16ba024b9d5eae0e54c29 Mon Sep 17 00:00:00 2001 From: bbracker Date: Sat, 17 Jul 2021 14:52:34 -0400 Subject: [PATCH 3/3] separated buildroot debugging from buildroot logging --- .gitignore | 2 + .../buildroot-config-src/main.config | 2 +- .../testvector-generation/debugBuildroot.sh | 39 +++++++++++++++++++ .../testvector-generation/gdbinit_debug | 9 ++++- .../gdbinit_qemulog_debug | 10 ----- .../testvector-generation/logAllBuildroot.sh | 30 -------------- 6 files changed, 49 insertions(+), 43 deletions(-) create mode 100755 wally-pipelined/linux-testgen/testvector-generation/debugBuildroot.sh delete mode 100755 wally-pipelined/linux-testgen/testvector-generation/gdbinit_qemulog_debug diff --git a/.gitignore b/.gitignore index a015fb3f..cfde0fa6 100644 --- a/.gitignore +++ b/.gitignore @@ -35,5 +35,7 @@ wally-pipelined/linux-testgen/linux-testvectors/intermediate-outputs/* wally-pipelined/linux-testgen/buildroot/ wally-pipelined/linux-testgen/buildroot-image-output wally-pipelined/linux-testgen/buildroot-config-src/main.config.old +wally-pipelined/linux-testgen/buildroot-config-src/linux.config.old +wally-pipelined/linux-testgen/buildroot-config-src/busybox.config.old wally-pipelined/regression/slack-notifier/slack-webhook-url.txt diff --git a/wally-pipelined/linux-testgen/buildroot-config-src/main.config b/wally-pipelined/linux-testgen/buildroot-config-src/main.config index 7888971c..438d3f36 100644 --- a/wally-pipelined/linux-testgen/buildroot-config-src/main.config +++ b/wally-pipelined/linux-testgen/buildroot-config-src/main.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Buildroot -gafcb8fe-dirty Configuration +# Buildroot -g73f9753-dirty Configuration # BR2_HAVE_DOT_CONFIG=y diff --git a/wally-pipelined/linux-testgen/testvector-generation/debugBuildroot.sh b/wally-pipelined/linux-testgen/testvector-generation/debugBuildroot.sh new file mode 100755 index 00000000..2f1382bb --- /dev/null +++ b/wally-pipelined/linux-testgen/testvector-generation/debugBuildroot.sh @@ -0,0 +1,39 @@ +# Oftentimes this script runs so long you'll go to sleep. +# But you don't want the script to die when your computer goes to sleep. +# So consider invoking this with nohup (i.e. "nohup ./logAllBuildroot.sh") +# You can run "tail -f nohup.out" to see what would've +# outputted to the terminal if you didn't use nohup + +customQemu="/courses/e190ax/qemu_sim/rv64_initrd/qemu_experimental/qemu/build/qemu-system-riscv64" +#customQemu="qemu-system-riscv64" +imageDir="../buildroot-image-output" +intermedDir="../linux-testvectors/intermediate-outputs" +outDir="../linux-testvectors" + +# =========== Debug the Process ========== +# Uncomment this version for QEMU debugging of kernel +# - good for poking around VM if it boots up +# - good for running QEMU commands (press "Ctrl-A" then "c" to open QEMU command prompt) +$customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio +# Uncomment this version for GDB debugging of kernel +# - attempts to load in symbols from "vmlinux" +# - good for looking at backtraces when Linux gets stuck for some reason +#$customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -gdb tcp::1237 -S & riscv64-unknown-elf-gdb -x gdbinit_debug + +# Uncomment this version to generate qemu_output.txt +# - Uses GDB script +# - Logs raw QEMU output to qemu_output.txt +#($customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -d nochain,cpu,in_asm -serial /dev/null -singlestep -gdb tcp::1237 -S 2> $intermedDir/qemu_output.txt) & riscv64-unknown-elf-gdb -x gdbinit_debug + +# Uncomment this version for parse_qemu.py debugging +# - Uses qemu_output.txt +# - Makes qemu_in_gdb_format.txt +# - Splits qemu_in_gdb_format.txt into chunks of 100,000 instrs +#cat $intermedDir/qemu_output.txt | ./parse_qemu.py >$intermedDir/qemu_in_gdb_format.txt +#cd $intermedDir +#split -d -l 5600000 ./qemu_in_gdb_format.txt --verbose +#cd ../../testvector-generation + +# Uncomment this version for parse_gdb_output.py debugging +# - Uses qemu_in_gdb_format.txt +# - Makes testvectors#cat $intermedDir/qemu_in_gdb_format.txt | ./parse_gdb_output.py "$outDir" diff --git a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_debug b/wally-pipelined/linux-testgen/testvector-generation/gdbinit_debug index c7a03428..0bc9e9b8 100644 --- a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_debug +++ b/wally-pipelined/linux-testgen/testvector-generation/gdbinit_debug @@ -1,3 +1,8 @@ -file ../buildroot-image-output/vmlinux set pagination off -target extended-remote :1236 +file ../buildroot-image-output/fw_jump.elf +target extended-remote :1237 +b irqchip_plic_warm_init +c +file ../buildroot-image-output/vmlinux +b plic_init +c diff --git a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_qemulog_debug b/wally-pipelined/linux-testgen/testvector-generation/gdbinit_qemulog_debug deleted file mode 100755 index b349fd88..00000000 --- a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_qemulog_debug +++ /dev/null @@ -1,10 +0,0 @@ -set pagination off -target extended-remote :1236 -maint print symbols symbols.txt -b *0x000000008020103c -c -del 1 -stepi 100000 -set confirm off -kill -q diff --git a/wally-pipelined/linux-testgen/testvector-generation/logAllBuildroot.sh b/wally-pipelined/linux-testgen/testvector-generation/logAllBuildroot.sh index 797b9f7d..e0f6b36e 100755 --- a/wally-pipelined/linux-testgen/testvector-generation/logAllBuildroot.sh +++ b/wally-pipelined/linux-testgen/testvector-generation/logAllBuildroot.sh @@ -10,35 +10,5 @@ imageDir="../buildroot-image-output" intermedDir="../linux-testvectors/intermediate-outputs" outDir="../linux-testvectors" -# =========== Debug the Process ========== -# Uncomment this version for QEMU debugging of kernel -# - good for poking around VM if it boots up -# - good for running QEMU commands (press "Ctrl-A" then "c" to open QEMU command prompt) -#$customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -# Uncomment this version for GDB debugging of kernel -# - attempts to load in symbols from "vmlinux" -# - good for looking at backtraces when Linux gets stuck for some reason -#$customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -gdb tcp::1236 -S & riscv64-unknown-elf-gdb -x gdbinit_debug - -# Uncomment this version to generate qemu_output.txt -# - Uses GDB script -# - Logs raw QEMU output to qemu_output.txt -#($customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -d nochain,cpu,in_asm -serial /dev/null -singlestep -gdb tcp::1236 -S 2> $intermedDir/qemu_output.txt) & riscv64-unknown-elf-gdb -x gdbinit_qemulog_debug - -# Uncomment this version for parse_qemu.py debugging -# - Uses qemu_output.txt -# - Makes qemu_in_gdb_format.txt -# - Splits qemu_in_gdb_format.txt into chunks of 100,000 instrs -#cat $intermedDir/qemu_output.txt | ./parse_qemu.py >$intermedDir/qemu_in_gdb_format.txt -#cd $intermedDir -#split -d -l 5600000 ./qemu_in_gdb_format.txt --verbose -#cd ../../testvector-generation - -# Uncomment this version for parse_gdb_output.py debugging -# - Uses qemu_in_gdb_format.txt -# - Makes testvectors#cat $intermedDir/qemu_in_gdb_format.txt | ./parse_gdb_output.py "$outDir" - -# =========== Just Do the Thing ========== -# Uncomment this version for the whole thing # - Logs info needed by buildroot testbench ($customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -d nochain,cpu,in_asm -serial /dev/null -singlestep -gdb tcp::1236 -S 2>&1 >/dev/null | ./parse_qemu.py | ./parse_gdb_output.py "$outDir") & riscv64-unknown-elf-gdb -x gdbinit_qemulog