diff --git a/wally-pipelined/src/muldiv/intdivrestoring.sv b/wally-pipelined/src/muldiv/intdivrestoring.sv
index 8f4947da..f0731ea0 100644
--- a/wally-pipelined/src/muldiv/intdivrestoring.sv
+++ b/wally-pipelined/src/muldiv/intdivrestoring.sv
@@ -63,12 +63,12 @@ module intdivrestoring (
 
   // Take absolute value for signed operations
   neg #(`XLEN) negd(DSavedE, DnE);
-  mux2 #(`XLEN) dabsmux(DSavedE, DnE, SignedDivideE & SignDE, Din);  // take absolute value for signed operations
+  mux2 #(`XLEN) dabsmux(DnE, DSavedE, SignedDivideE & SignDE, DAbsB);  // take absolute value for signed operations, and negate for subtraction setp
   neg #(`XLEN) negx(XSavedE, XnE);
   mux2 #(`XLEN) xabsmux(XSavedE, XnE, SignedDivideE & SignXE, Xinit);  // need original X as remainder if doing divide by 0
 
   // Negate D for subtraction
-  assign DAbsB = ~Din;
+  //assign DAbsB = ~Din;
   // *** merge this into dabsmux if possible
   // Put suffixes on Xinit, init->DivInitE, Wn, XQn
 
diff --git a/wally-pipelined/src/muldiv/intdivrestoringstep.sv b/wally-pipelined/src/muldiv/intdivrestoringstep.sv
index 3dcf7da5..8fce91f6 100644
--- a/wally-pipelined/src/muldiv/intdivrestoringstep.sv
+++ b/wally-pipelined/src/muldiv/intdivrestoringstep.sv
@@ -33,7 +33,7 @@ module intdivrestoringstep(
   logic qi, qib;
   
   assign {WShift, XQOut} = {W[`XLEN-2:0], XQ, qi};
-  assign {qib, WPrime} = {1'b0, WShift} + {1'b1, DAbsB} + 1; // subtractor, carry out determines quotient bit ***replace with add
+  assign {qib, WPrime} = {1'b0, WShift} + {1'b1, DAbsB} /*+ 1*/; // subtractor, carry out determines quotient bit ***replace with add
   assign qi = ~qib;
   mux2 #(`XLEN) wrestoremux(WShift, WPrime, qi, WOut);
 endmodule