From 3ebb7f105720e810fd5d8f599517b59c35b0f0c3 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Sun, 3 Apr 2022 17:31:07 -0500 Subject: [PATCH] fpga simulation works again. --- pipelined/regression/wally-pipelined-fpga.do | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/pipelined/regression/wally-pipelined-fpga.do b/pipelined/regression/wally-pipelined-fpga.do index e39da4da..8e05695b 100644 --- a/pipelined/regression/wally-pipelined-fpga.do +++ b/pipelined/regression/wally-pipelined-fpga.do @@ -30,7 +30,7 @@ vlib work # default to config/rv64ic, but allow this to be overridden at the command line. For example: # do wally-pipelined.do ../config/rv32ic switch $argc { - 0 {vlog +incdir+../config/fpga +incdir+../config/shared ../testbench/testbench-fpga.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv ../src/wally/wallypipelinedsocwrapper.v ../../fpga/sim/*.sv -suppress 2583} + 0 {vlog +incdir+../config/fpga +incdir+../config/shared ../testbench/testbench-fpga.sv ../testbench/sdc/*.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv ../src/wally/wallypipelinedsocwrapper.v ../../fpga/sim/*.sv -suppress 2583} 1 {vlog +incdir+$1 +incdir+../config/shared ../testbench/testbench-imperas.sv ../testbench/common/*.sv ../src/*/*.sv -suppress 2583} } # start and run simulation