From 38adcb5b17ce6991e15d0d9cef859f9f41ed5f8b Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Fri, 9 Dec 2022 16:42:05 -0600
Subject: [PATCH] Minor simplification of cacheway way selection muxes.

---
 pipelined/src/cache/cache.sv    |  2 +-
 pipelined/src/cache/cacheway.sv | 17 +++++++++++++++--
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/pipelined/src/cache/cache.sv b/pipelined/src/cache/cache.sv
index 4c2942eb..32112935 100644
--- a/pipelined/src/cache/cache.sv
+++ b/pipelined/src/cache/cache.sv
@@ -174,7 +174,7 @@ module cache #(parameter LINELEN,  NUMLINES,  NUMWAYS, LOGBWPL, WORDLEN, MUXINTE
 		.d1({Tag, PAdr[SETTOP-1:OFFSETLEN], {OFFSETLEN{1'b0}}}),
 		.d2({Tag, FlushAdr, {OFFSETLEN{1'b0}}}),
 		.s({SelFlush, SelEvict}), .y(CacheBusAdr));
-
+  
   /////////////////////////////////////////////////////////////////////////////////////////////
   // Flush address and way generation during flush
   /////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/pipelined/src/cache/cacheway.sv b/pipelined/src/cache/cacheway.sv
index 09686bf9..8a075a46 100644
--- a/pipelined/src/cache/cacheway.sv
+++ b/pipelined/src/cache/cacheway.sv
@@ -77,9 +77,22 @@ module cacheway #(parameter NUMLINES=512, parameter LINELEN = 256, TAGLEN = 26,
   logic                              SetDirtyWay;
   logic                              ClearDirtyWay;
   logic                              SelectedWay;
+  logic                              SelWriteback;
+  logic                              SelData;
+  logic                              FlushWayEn, VictimWayEn;
+  
+
+  assign FlushWayEn = FlushWay & SelFlush;
+  assign VictimWayEn = VictimWay & SelEvict;
+  
+  assign SelWriteback = SelFlush | SetValid | SelEvict;
+  //assign SelWriteback = FlushWay | SetValid | SelEvict;
   
   mux2 #(1) seltagmux(VictimWay, FlushWay, SelFlush, SelTag);
-  mux2 #(1) selectedwaymux(HitWay, SelTag, SelFlush | SetValid | SelEvict, SelectedWay);
+  //assign SelTag = VictimWay | FlushWay;
+  assign SelData = HitWay | FlushWayEn | VictimWayEn;
+  
+  mux2 #(1) selectedwaymux(HitWay, SelTag, SelWriteback , SelectedWay);
 
   /////////////////////////////////////////////////////////////////////////////////////////////
   // Write Enable demux
@@ -133,7 +146,7 @@ module cacheway #(parameter NUMLINES=512, parameter LINELEN = 256, TAGLEN = 26,
   end
 
   // AND portion of distributed read multiplexers
-  assign ReadDataLineWay = SelectedWay ? ReadDataLine : '0;  // AND part of AO mux.
+  assign ReadDataLineWay = SelData ? ReadDataLine : '0;  // AND part of AO mux.
 
   /////////////////////////////////////////////////////////////////////////////////////////////
   // Valid Bits