diff --git a/wally-pipelined/bin/extractFunctionRadix.sh b/wally-pipelined/bin/extractFunctionRadix.sh index 1a8ca7f6..0cec0972 100755 --- a/wally-pipelined/bin/extractFunctionRadix.sh +++ b/wally-pipelined/bin/extractFunctionRadix.sh @@ -1,10 +1,17 @@ #!/bin/bash +allProgramRadixFile="FunctionRadix" + +index=0 + for objDumpFile in "$@"; do - # get the lines with named labels from the obj files. - listOfAddr=`egrep -i '^[0-9]{8} <[0-9a-zA-Z_]+>' $objDumpFile` + # 64 bit addresses + listOfAddr16=`egrep -i '^[0-9]{16} <[0-9a-zA-Z_]+>' $objDumpFile` + # 32 bit addresses + listOfAddr8=`egrep -i '^[0-9]{8} <[0-9a-zA-Z_]+>' $objDumpFile` + listOfAddr=`echo "$listOfAddr16" "$listOfAddr8"` # parse out the addresses and the labels addresses=`echo "$listOfAddr" | awk '{print $1}'` @@ -29,4 +36,12 @@ do echo " -default hex -color green" >> $objDumpFile.do echo "}" >> $objDumpFile.do + # now create the all in one version + # put the index at the begining of each line + allAddresses=`paste -d'\0' <(printf "%04x" "$index") <(echo "$addresses")` + + printf "%04x%s" "$index" "$addresses" >> $allProgramRadixFile.addr + + index=$(($index+1)) + done diff --git a/wally-pipelined/regression/wave.do b/wally-pipelined/regression/wave.do index 2890b8b6..3601be0f 100644 --- a/wally-pipelined/regression/wave.do +++ b/wally-pipelined/regression/wave.do @@ -8,13 +8,13 @@ add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE add wave -noupdate -divider add wave -noupdate /testbench/dut/hart/ebu/IReadF -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/BPPredWrongE -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/RetM -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/TrapM -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/LoadStallD -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/InstrStall -add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/DataStall +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/RetM +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/TrapM +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/InstrStall +add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/DataStall add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE @@ -22,41 +22,41 @@ add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbe add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD -add wave -noupdate -expand -group Bpred -expand -group direction -divider Update -add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC -add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN -add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex -add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction -add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory -add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassF -add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassD -add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE -add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF -add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD -add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE -add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM +add wave -noupdate -group Bpred -expand -group direction -divider Update +add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC +add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN +add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex +add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction +add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory +add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassF +add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassD +add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE +add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF +add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD +add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE +add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredWrongE -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCF -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredPCF -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext0F -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE -add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCF +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredPCF +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext0F +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE +add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/ValidBits add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredF add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBValidF add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPCIndexQ add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePCIndexQ add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPC -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE -add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE +add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE add wave -noupdate -group BTB -divider Update add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC @@ -77,6 +77,12 @@ add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd1 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/we3 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3 +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ALUResultW +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ReadDataW +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/PCLinkW +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW +add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW add wave -noupdate /testbench/dut/hart/ieu/c/RegWriteE add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD add wave -noupdate -group {Decode Stage} /testbench/InstrDName @@ -90,11 +96,29 @@ add wave -noupdate -expand -group dcache /testbench/dut/hart/MemPAdrM add wave -noupdate -expand -group dcache /testbench/dut/hart/WriteDataM add wave -noupdate -expand -group dcache /testbench/dut/hart/ReadDataM add wave -noupdate -expand -group dcache /testbench/dut/hart/dmem/MemRWM +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2E +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdE +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdM +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdW +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/MemReadE +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteM +add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteW +add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardAE +add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardBE +add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/LoadStallD +add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/WriteDataE +add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALUResultE +add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE +add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE +add wave -noupdate /testbench/dut/hart/ieu/dp/ALUResultM TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 2} {363960 ns} 0} {{Cursor 3} {365915 ns} 0} +WaveRestoreCursors {{Cursor 2} {231033 ns} 0} {{Cursor 3} {1276133 ns} 0} quietly wave cursor active 2 configure wave -namecolwidth 250 -configure wave -valuecolwidth 185 +configure wave -valuecolwidth 518 configure wave -justifyvalue left configure wave -signalnamewidth 1 configure wave -snapdistance 10 @@ -107,4 +131,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {365848 ns} {366032 ns} +WaveRestoreZoom {1276094 ns} {1276208 ns} diff --git a/wally-pipelined/testbench/function_radix.sv b/wally-pipelined/testbench/function_radix.sv new file mode 100644 index 00000000..e13fbfcb --- /dev/null +++ b/wally-pipelined/testbench/function_radix.sv @@ -0,0 +1,84 @@ +// Ross Thompson +// November 05, 2019 +// Oklahoma State University + +module function_radix(); + + parameter PRELOAD_FILE = "funct_addr.txt"; + + integer memory_bank []; + integer index; + + logic [`XLEN-1:0] pc; + + initial begin + $init_signal_spy("/riscv_mram_tb/dut/pc", "/riscv_mram_tb/function_radix/pc"); + end + + task automatic bin_search_min; + input integer pc; + input integer length; + ref integer array []; + output integer minval; + + integer left, right; + integer mid; + + begin + left = 0; + right = length; + while (left <= right) begin + mid = left + ((right - left) / 2); + if (array[mid] == pc) begin + minval = array[mid]; + return; + end + if (array[mid] < pc) begin + left = mid + 1; + end else begin + right = mid -1; + end + end // while (left <= right) + // if the element pc is now found, right and left will be equal at this point. + // we need to check if pc is less than the array at left or greather. + // if it is less than pc, then we select left as the index. + // if it is greather we want 1 less than left. + if (array[left] < pc) begin + minval = array[left]; + return; + end else begin + minval = array[left-1]; + return; + end + end + endtask + + + // preload + initial $readmemh(PRELOAD_FILE, memory_bank); + + // we need to count the number of lines in the file so we can set line_count. + integer fp; + integer line_count = 0; + logic [31:0] line; + initial begin + fp = $fopen(PRELOAD_FILE, "r"); + // read line by line to count lines + if (fp) begin + while (! $feof(fp)) begin + $fscanf(fp, "%h\n", line); + line_count = line_count + 1; + end + end else begin + $display("Cannot open file %s for reading.", PRELOAD_FILE); + $stop; + end + end + + always @(pc) begin + bin_search_min(pc, line_count, memory_bank, index); + + end + +endmodule // function_radix + diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index 91e32059..38b9a6d7 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -405,7 +405,11 @@ string tests32i[] = { reset = 1; # 17; reset = 0; end end - end + end // always @ (negedge clk) + + // track the current function or label + function_rfunction_radix function_radix(); + endmodule /* verilator lint_on STMTDLY */