diff --git a/wally-pipelined/src/muldiv/muldiv.sv b/wally-pipelined/src/muldiv/muldiv.sv
index 9974dae0..c61b02c4 100644
--- a/wally-pipelined/src/muldiv/muldiv.sv
+++ b/wally-pipelined/src/muldiv/muldiv.sv
@@ -62,7 +62,7 @@ module muldiv (
 	 // Divide
 
 	// *** replace this clock gater
-	always @(~clk) begin
+	always @(negedge clk) begin
 	  enable_q <= ~StallM;
 	end
 	assign gclk = enable_q & clk;