From 34e0b3bc61c81ccee377fb2ea2570ffcfa2cacd4 Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 24 Mar 2023 08:27:30 -0700 Subject: [PATCH] Shifter sign simplification and capitalization --- src/ieu/alu.sv | 5 +---- src/ieu/shifter.sv | 19 +++++++++++-------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/ieu/alu.sv b/src/ieu/alu.sv index 11759b1d..47af5f4d 100644 --- a/src/ieu/alu.sv +++ b/src/ieu/alu.sv @@ -51,14 +51,11 @@ module alu #(parameter WIDTH=32) ( logic Carry, Neg; // Flags: carry out, negative logic LT, LTU; // Less than, Less than unsigned logic Asign, Bsign; // Sign bits of A, B - logic ShiftSignA; // A, A sign bit muxes if (WIDTH == 64) begin - mux3 #(1) signmux(A[63], A[31], 1'b0, {~SubArith, W64}, ShiftSignA); mux3 #(64) extendmux({{32{1'b0}}, A[31:0]},{{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, CondExtA); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux end else begin - mux2 #(1) signmux(1'b0, A[31], SubArith, ShiftSignA); assign CondExtA = A; end @@ -67,7 +64,7 @@ module alu #(parameter WIDTH=32) ( assign {Carry, Sum} = CondShiftA + CondMaskInvB + {{(WIDTH-1){1'b0}}, SubArith}; // Shifts (configurable for rotation) - shifter sh(.A(CondExtA), .Sign(ShiftSignA), .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .W64, .Y(Shift), .Rotate(BALUControl[2])); + shifter sh(.A(CondExtA), .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .W64, .SubArith, .Y(Shift), .Rotate(BALUControl[2])); // Condition code flags are based on subtraction output Sum = A-B. // Overflow occurs when the numbers being subtracted have the opposite sign diff --git a/src/ieu/shifter.sv b/src/ieu/shifter.sv index d0a6471c..8dbdf88e 100644 --- a/src/ieu/shifter.sv +++ b/src/ieu/shifter.sv @@ -30,13 +30,16 @@ `include "wally-config.vh" module shifter ( - input logic [`XLEN-1:0] A, // shift Source - input logic [`LOG_XLEN-1:0] Amt, // Shift amount - input logic Right, Rotate, W64, Sign, // Shift right, rotate signals - output logic [`XLEN-1:0] Y); // Shifted result + input logic [`XLEN-1:0] A, // shift Source + input logic [`LOG_XLEN-1:0] Amt, // Shift amount + input logic Right, Rotate, W64, SubArith, // Shift right, rotate, W64-type operation, arithmetic shift + output logic [`XLEN-1:0] Y); // Shifted result - logic [2*`XLEN-2:0] z, zshift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits - logic [`LOG_XLEN-1:0] amttrunc, offset; // Shift amount adjusted for RV64, right-shift amount + logic [2*`XLEN-2:0] z, zshift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits + logic [`LOG_XLEN-1:0] amttrunc, Offset; // Shift amount adjusted for RV64, right-shift amount + logic Sign; // Sign bit for sign extension + + assign Sign = A[`XLEN-1] & SubArith; // sign bit for sign extension if (`ZBB_SUPPORTED) begin: rotfunnel if (`XLEN==32) begin // rv32 with rotates @@ -76,10 +79,10 @@ module shifter ( end // Opposite offset for right shifts - assign offset = Right ? amttrunc : ~amttrunc; + assign Offset = Right ? amttrunc : ~amttrunc; // Funnel operation - assign zshift = z >> offset; + assign zshift = z >> Offset; assign Y = zshift[`XLEN-1:0]; endmodule