From 2b3038edf80cff21d5e4483d6a5c7eefee622b9c Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Tue, 5 Jul 2022 02:28:59 +0000
Subject: [PATCH] Added check to halt testbench on  failing to find file

---
 pipelined/regression/wally-pipelined-batch.do |  4 ++--
 pipelined/regression/wally-pipelined.do       | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/pipelined/regression/wally-pipelined-batch.do b/pipelined/regression/wally-pipelined-batch.do
index 1434cb41..c099e41c 100644
--- a/pipelined/regression/wally-pipelined-batch.do
+++ b/pipelined/regression/wally-pipelined-batch.do
@@ -36,7 +36,7 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     vlog -lint -work wkdir/work_${1}_${2} +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583
     # start and run simulation
     vopt wkdir/work_${1}_${2}.testbench -work wkdir/work_${1}_${2} -G RISCV_DIR=$3 -G INSTR_LIMIT=$4 -G INSTR_WAVEON=$5 -G CHECKPOINT=$6 -o testbenchopt 
-    vsim -lib wkdir/work_${1}_${2} testbenchopt -suppress 8852,12070,3084
+    vsim -lib wkdir/work_${1}_${2} testbenchopt -suppress 8852,12070,3084  -fatal 7
 
     run -all
     run -all
@@ -46,7 +46,7 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     # start and run simulation
     # remove +acc flag for faster sim during regressions if there is no need to access internal signals
     vopt wkdir/work_${1}_${2}.testbench -work wkdir/work_${1}_${2} -G TEST=$2 -o testbenchopt
-    vsim -lib wkdir/work_${1}_${2} testbenchopt 
+    vsim -lib wkdir/work_${1}_${2} testbenchopt  -fatal 7
     # Adding coverage increases runtime from 2:00 to 4:29.  Can't run it all the time
     #vopt work_$2.testbench -work work_$2 -o workopt_$2 +cover=sbectf
     #vsim -coverage -lib work_$2 workopt_$2
diff --git a/pipelined/regression/wally-pipelined.do b/pipelined/regression/wally-pipelined.do
index dce86f68..6ef601f5 100644
--- a/pipelined/regression/wally-pipelined.do
+++ b/pipelined/regression/wally-pipelined.do
@@ -35,7 +35,7 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     vlog -lint -work work_${1}_${2} +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583
     # start and run simulation
     vopt +acc work_${1}_${2}.testbench -work work_${1}_${2} -G RISCV_DIR=$3 -G INSTR_LIMIT=$4 -G INSTR_WAVEON=$5 -G CHECKPOINT=$6 -G NO_SPOOFING=0 -o testbenchopt 
-    vsim -lib work_${1}_${2} testbenchopt -suppress 8852,12070,3084,3829
+    vsim -lib work_${1}_${2} testbenchopt -suppress 8852,12070,3084,3829  -fatal 7
 
     #-- Run the Simulation
     run -all
@@ -49,7 +49,7 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     vlog -lint -work work_${1}_${2} +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-linux.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583
     # start and run simulation
     vopt +acc work_${1}_${2}.testbench -work work_${1}_${2} -G RISCV_DIR=$3 -G INSTR_LIMIT=0 -G INSTR_WAVEON=0 -G CHECKPOINT=0 -G NO_SPOOFING=1 -o testbenchopt 
-    vsim -lib work_${1}_${2} testbenchopt -suppress 8852,12070,3084,3829
+    vsim -lib work_${1}_${2} testbenchopt -suppress 8852,12070,3084,3829  -fatal 7
 
     #-- Run the Simulation
     echo "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"
@@ -69,7 +69,7 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv   ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063
     vopt +acc work.testbench -G TEST=$2 -G DEBUG=1 -o workopt 
 
-    vsim workopt +nowarn3829
+    vsim workopt +nowarn3829  -fatal 7
 
     view wave
     #-- display input and output signals as hexidecimal values
@@ -78,12 +78,12 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     do wave.do
 
     # power add generates the logging necessary for saif generation.
-    power add -r /dut/core/*
+    #power add -r /dut/core/*
     #-- Run the Simulation 
 
     run -all
-    power off -r /dut/core/*
-    power report -all -bsaif power.saif
+    #power off -r /dut/core/*
+    #power report -all -bsaif power.saif
     noview ../testbench/testbench.sv
     view wave
 }