diff --git a/pipelined/src/privileged/privileged.sv b/pipelined/src/privileged/privileged.sv
index e4d5ded1..8a5068a7 100644
--- a/pipelined/src/privileged/privileged.sv
+++ b/pipelined/src/privileged/privileged.sv
@@ -104,7 +104,7 @@ module privileged (
   // track the current privilege level
   ///////////////////////////////////////////
 
-  privmode privmode(.clk, .reset, .StallW, .TrapM, .mretM, .sretM, .CauseM, 
+  privmode privmode(.clk, .reset, .StallW, .TrapM, .mretM, .sretM, .InterruptM, .CauseM, 
                     .MEDELEG_REGW, .MIDELEG_REGW, .STATUS_MPP, .STATUS_SPP, .NextPrivilegeModeM, .PrivilegeModeW);
 
   ///////////////////////////////////////////
diff --git a/pipelined/src/privileged/privmode.sv b/pipelined/src/privileged/privmode.sv
index d48c57d5..8fcd4905 100644
--- a/pipelined/src/privileged/privmode.sv
+++ b/pipelined/src/privileged/privmode.sv
@@ -33,7 +33,7 @@
 
 module privmode (
   input  logic             clk, reset,
-  input  logic             StallW, TrapM, mretM, sretM,
+  input  logic             StallW, TrapM, mretM, sretM, InterruptM,
   input  logic [`XLEN-1:0] CauseM, MEDELEG_REGW,
   input  logic [11:0]      MIDELEG_REGW,
   input  logic [1:0]       STATUS_MPP,
@@ -45,7 +45,7 @@ module privmode (
     logic       md;
 
     // get bits of DELEG registers based on CAUSE
-    assign md = CauseM[`XLEN-1] ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM[`LOG_XLEN-1:0]];
+    assign md = InterruptM ? MIDELEG_REGW[CauseM[3:0]] : MEDELEG_REGW[CauseM[`LOG_XLEN-1:0]];
     
     // PrivilegeMode FSM
     always_comb begin