From 319a1b916167d2c9d7c475ccb71b6f1977876778 Mon Sep 17 00:00:00 2001
From: eroom1966 <moore@imperas.com>
Date: Thu, 6 Apr 2023 14:45:41 +0100
Subject: [PATCH] fix break to simulation testbench

---
 testbench/testbench_imperas.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/testbench/testbench_imperas.sv b/testbench/testbench_imperas.sv
index 56ca763a..b6d22fea 100644
--- a/testbench/testbench_imperas.sv
+++ b/testbench/testbench_imperas.sv
@@ -403,7 +403,7 @@ module DCacheFlushFSM
                            // these dirty bit selections would be needed if dirty is moved inside the tag array.
           //.dirty(testbench.dut.core.lsu.bus.dcache.dcache.CacheWays[way].dirty.DirtyMem.RAM[index]),
           //.dirty(testbench.dut.core.lsu.bus.dcache.dcache.CacheWays[way].CacheTagMem.RAM[index][`PA_BITS+tagstart]),
-          .data(testbench.dut.core.lsu.bus.dcache.dcache.CacheWays[way].word[cacheWord].CacheDataMem.RAM[index]),
+          .data(testbench.dut.core.lsu.bus.dcache.dcache.CacheWays[way].word[cacheWord].wordram.CacheDataMem.RAM[index]),
           .index(index),
           .cacheWord(cacheWord),
           .CacheData(CacheData[way][index][cacheWord]),